DLA SMD-5962-98586 REV B-2009 MICROCIRCUIT MEMORY DIGITAL BICMOS 512 x 8-BIT CUSTOM MASKED ROM MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A CINand COUTchanged from 10 pF to 15 pF. Corrections to figure 2 and Table I conditions column for VOL, VOH, IIH, ICEX. glg 01-02-07 Raymond Monnin B Update to paragraphs, part of regular review cycle. ksr 09-02-17 Robert M. Heber REV SHEET REV SH

2、EET REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary L. Gross DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE B

3、Y ALL DEPARTMENTS APPROVED BY Raymond Monnin MICROCIRCUIT, MEMORY, DIGITAL, BICMOS,512 x 8-BIT CUSTOM MASKED ROM, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 99-11-05 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-98586 SHEET 1 OF 14 DSCC FORM 2233 APR 9

4、7 5962-E182-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962- 98586 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing d

5、ocuments two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardn

6、ess Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 98586 01 Q X C | | | | | | | | | | | | | | | | | | Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designat

7、or (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA

8、 levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device types. The device types shall identify the circuit function as follows: Device type Generic number 1/ Circuit function Access time 01 27S29-70 512 x 8-bit custom masked ROM 70 ns 1.2.3 Dev

9、ice class designator. The device class designator shall be a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance w

10、ith MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line package S GDF

11、P2-F20 or CDFP3-F20 20 Flat package 2 CQCC1-N20 20 Square chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1/ Generic numbers are also listed on the Standard Microcircuit Drawing Source Approv

12、al Bulletin at the end of this document and will also be listed in QML-38535 and MIL-HDBK-103 (see 6.6.1 and 6.6.2 herein). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962- 98586 DEFENSE SUPPLY CENTER COLUMBU

13、S COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc Input voltage range . -0.5 V dc to +5.5 V dc Storage temperature range. -65C to +150C Maximum power dissipation (PD) 1/ 500 mW Lead temperature

14、 (soldering, 10 seconds maximum) +300C Thermal resistance, junction-to-case (JC): . See MIL-STD-1835 Junction temperature (TJ) +175C DC voltage applied to outputs (except during programming) -0.5 V to +VCCmaximum DC voltage applied to outputs during programming . 21 V dc DC current into outputs duri

15、ng programming (max duration 1.0 sec). 250 mA dc DC input current . -30 mA to +5 mA 1.4 Recommended operating conditions. Minimum high-levelinput voltage (VIH) 2.0 V Maximum low-levelinput voltage (VIL) 0.8 V dc Case operating temperature range (TC) -55C to +125C Supply voltage (VCC) . +4.5 V dc min

16、imum to +5.5 V dc maximum 1.5 Digital logic testing for device classes Q and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012) as specified in the altered item drawing (AID) 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The f

17、ollowing specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturi

18、ng, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microc

19、ircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 1/ Must withstand the added PD due to short circuit test (e.g., IOS). Provided by

20、 IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962- 98586 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following document(s) f

21、orm a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena from Heav

22、y Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Lat

23、ch-Up Test. (Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the document

24、s. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, super

25、sedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality

26、 Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, con

27、struction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Terminal connections. The terminal connections shall be as specified on

28、 figure 1. 3.2.2 AC switching test circuit. The ac switching test circuit shall be as specified on figure 2. 3.2.3 Switching waveforms. The switching waveforms shall be as specified on figure 3. 3.3 AID requirements. All AIDs written against this SMD shall be sent to DSCC-VAS. The following items sh

29、all be provided to the device manufacturer by the customer as part of an AID. These items form a part of the manufacturers design database/database archive and shall be maintained under document revision level control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-P

30、RF-38535 and shall be made available to the acquiring or preparing activity upon request. As such, some items may not appear in the AID in the traditional sense. 3.3.1 ROM mask definition. To generate a mask for a ROM code, a properly formatted file shall be submitted. The format for the code shall

31、be as follows: a. Two hexadecimal fields, address followed by data, most significant bit to least significant bit (AH is most significant bit). b. Lines must be sequenced in increasing order of addresses starting with 00. c. Address and data fields must be separated by at least one space. No spaces

32、are permitted within either individual field. d. A semicolon “;” may terminate the line, but is not required. e. No “end-of-file” characters are required. f. Comments are preceded by the pound sign “#”. g. Comments may be on the same line AFTER address and data fields. h. Unused locations do not nee

33、d to be addressed, but MUST be specified as all zeros or all ones. This can be done as a comment. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962- 98586 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-399

34、0 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.3.2 Fault coverage measurement of manufacturing logic tests. 3.3.3 Burn-in circuit. 3.3.4 Programmed devices. The truth table for final masked (programmed) devices shall be as specified in the altered item drawing. 3.4 Electrical performance charact

35、eristics and postirradiation parameter limits. Unless otherwise specified, the electrical performance characteristics, and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.5 Electrical test requirements. The electrical tes

36、t requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. 3.6 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PI

37、N number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device c

38、lass M shall be in accordance with MIL-PRF-38535, appendix A. The AID number or equivalent shall be added to the marking by the manufacturer. 3.6.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance ma

39、rk for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.7 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For

40、device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affir

41、m that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.8 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL

42、-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.9 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to thi

43、s drawing is required for any change that affects this drawing. 3.10 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shal

44、l be made available onshore at the option of the reviewer. 3.11 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 42 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permit

45、ted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962- 98586 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C 4.5 V VCC 5.5 V Group A subg

46、roups Device type Limits Unit Unless otherwise specified Min Max Output low voltage VOLVCC= MIN, IOL= 8 mA, VIN = VIH or VILVIL = 0.0 V, VIH = 3.0 V 1, 2, 3 All 0.5 V Output high voltage VOHVCC= MIN, IOH= -0.9 mA, VIN= VIH or VILVIL = 0.0 V, VIH = 3.0 V 1, 2, 3 All 2.4 V Input low current IILVCC= MA

47、X, VIN= 0.45 V 1, 2, 3 All -250 A Input high current IIHVCC= MAX, VIN= 2.4 V 1, 2, 3 All 40 A Output short circuit current ISCVCC= MAX, VOUT = 0.0 V 1/ 1, 2, 3 All -20 -90 mA Power supply current ICCAll inputs = GND, VCC = MAX 1, 2, 3 All 160 mA Input clamp voltage VIVCC= MIN, IIN= -18 mA 1, 2, 3 Al

48、l -1.2 V Input capacitance 2/ CINVIN= 0 V, f = 1.0 MHz, TC= +25C, see 4.4.1c 4 All 15 pF Output capacitance 2/ COUT VIN = 0 V, f = 1.0 MHz, TC= +25C, see 4.4.1c 4 All 15 pF Functional tests See 4.4.1d 7,8A,8B All Output leakage current ICEX VCC= 5.5 V, VO= 2.4 V VIH = 3.0 V 1, 2, 3 All 40 A VCC= 5.5V, VO= 0.5V VIH = 3.0 V -40 Address valid to output valid access time tAVQV See figures 2 and 3 9, 10, 11 All 70 ns Delay from output enable valid to output high-Z tGVQZ See figures 2 and 3 9, 10, 11 Al