DLA SMD-5962-96540 REV J-2013 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED DUAL J-K FLIP-FLOP WITH CLEAR AND PRESET MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R143-97. 96-12-10 Monica L. Poelking B Incorporate Revision A. Update boilerplate to MIL-PRF-38535 requirements. LTG 01-09-04 Thomas M. Hess C Add appendix A. LTG 02-01-31 Thomas M. Hess D Add device types 02 a

2、nd 03. Delete RHA level “H” for device type 01. Add test circuit to figure 4. Add figure B-1 to appendix A. Update boilerplate and editorial changes throughout. - LTG 04-05-26 Thomas M. Hess E Make corrections for pin numbers 6 and 7 in figure 1, terminal connections. Editorial changes throughout. -

3、 LTG 05-12-06 Thomas M. Hess F Correct radiation features in section 1.5 and add footnote 8/. Correct footnotes 2/ and 7/ in Table IA. Correct paragraph 4.4.4.1. Correct SEP test limits in the table IB. Update boilerplate paragraphs to current MIL-PRF-38535 requirements. - MAA 09-09-09 Thomas M. Hes

4、s G Make corrections to table IA, output voltage tests VOHand VOL, change condition VIN- jak 11-01-26 Thomas M. Hess H Add footnote 5 to figure 4. Add equivalent circuit to figure 4 - jak 12-07-09 Thomas M. Hess J Add footnote 4/ for capacitance limit for measurements of propagation delay time to ta

5、ble IA. Delete class M requirement throughout. MAA 13-08-20 David J. Corbett REV SHEET REV J J J J J J J J J J J J J SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 REV STATUS REV J J J J J J J J J J J J J J OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thanh V. Nguyen DLA LAND

6、AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMO

7、S, RADIATION HARDENED, DUAL J-K FLIP-FLOP WITH CLEAR AND PRESET, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-04-12 REVISION LEVEL J SIZE A CAGE CODE 67268 5962-96540 SHEET 1 OF 27 DSCC FORM 2233 APR 97 5962-E525-13 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license

8、 from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96540 REVISION LEVEL J SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device class Q) and space applica

9、tion (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 H 965

10、40 01 V X C Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA l

11、evels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACS109 Radiation hardened, dual J-K flip-flop with clear and preset 02

12、54ACS109E Enhanced radiation hardened, dual J-K flip-flop with clear and preset 03 54ACS109E Enhanced radiation hardened, dual J-K flip-flop with clear and preset 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device

13、class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as de

14、signated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line X CDFP4-F16 16 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V. Provided by IHSNot for ResaleNo rep

15、roduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96540 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC in

16、put voltage range (VIN) -0.3 V dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperature range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds) +300C Thermal re

17、sistance, junction-to-case (JC): Case outlines E and X (device type 01) . See MIL-STD-1835 Case outline X (device types 02 and 03) . 15C/W Junction temperature (TJ) +175C Maximum package power dissipation (PD): Device type 01 . 1.0 W Device types 02 and 03 . 3.3 W 4/ 1.4 Recommended operating condit

18、ions. 2/ 3/ Supply voltage range (VDD): Device types 02 and 03 +3.0 V dc to +5.5 V dc Device type 01 +4.5 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VDDOutput voltage range (VOUT). +0.0 V dc to VDD Maximum input rise and fall time at VDD= 4.5 V (tr, tf) . 1 ns/V 5/ Case operating tempe

19、rature range (TC) . -55C to +125C 1.5 Radiation features. 6/ Maximum total dose available: Device type 01 (dose rate = 50 300 rads (Si)/s) 5 x 105Rad (Si) 7/ Device type 02 (effective dose rate = 1rad (Si)/s) 1 x 106Rad (Si) 8/ Device type 03 (dose rate = 50 300 rads (Si)/s) 5 x 105Rads (Si) 7/ Sing

20、le event phenomenon (SEP): Device type 01: No SEU occurs at effective LET (see 4.4.4.4) . 80 MeV/(mg/cm2) 9/ No SEL occurs at effective LET (see 4.4.4.4) . 120 MeV/(mg/cm2) 9/ Device types 02 and 03: No SEU occurs at effective LET (see 4.4.4.4) .108 MeV/(mg/cm2) 9/ No SEL occurs at effective LET (se

21、e 4.4.4.4) . 120 MeV/(mg/cm2) 9/ Dose rate upset (20 ns pulse) (device types 01, 02 and 03) .1 x 109Rads (Si)/s 9/ 10/ Dose rate induced latch-up . None 9/ Dose rate survivability (device types 01, 02 and 03) . 1 x 1012Rads (Si)/s 9/ 1/ Stresses above the absolute maximum rating may cause permanent

22、damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall apply over the full specified VDDrange and case temperature range

23、of -55C to +125C unless otherwise specified. 4/ Per MIL-STD-883 method 1012.1 section 3.4.1, PD(Package) = (TJ(max) - TC(max) . JC5/ Derate system propagation delays by difference in rise time to switch point for tror tf 1 ns/V. 6/ Radiation testing is performed on the standard evaluation circuit. 7

24、/ Device types 01 and 03 are tested in accordance with MIL-STD-883, method 1019, condition A. 8/ Device type 02 is irradiated at dose rate = 50 - 300 rads (Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is guaranteed to a maximum total dose specified. The effective dose rate aft

25、er extended room temperature anneal = 1 rad (Si)/s per MIL-STD-883, method 1019, condition A, section 3.11.2. The total dose specification for this device only applies to the specified effective dose rate, or lower, environment. 9/ Limits are guaranteed by design or process, but not production teste

26、d unless specified by the customer through the purchase order or contract. 10/ This limit is applicable for device types 01, 02, 03 with VDD 4.5 V. Device types 02 and 03 do not meet this limit at VDD 4.5 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH

27、S-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96540 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of th

28、is drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL

29、-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online a

30、t http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues

31、of these documents are those cited in the solicitation or contract. ASTM INTERNATIONAL (ASTM) ASTM F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of semiconductor Devices. (Copies of these documents are available online at http:/www.astm.o

32、rg or from ASTM International, 100 Barr Harbor Drive, P.O. Box C700, West Conshohocken, PA, 19428-2959). 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however,

33、 supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Q

34、uality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.1.1 Mic

35、rocircuit die. For the requirements of microcircuit die, see appendix A to this document. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and

36、 herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic di

37、agram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuits. The switching waveforms and test circuits shall be as specified on figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 59

38、62-96540 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 5 DSCC FORM 2234 APR 97 3.2.6 Radiation exposure circuit. The radiation exposure circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing and acqu

39、iring activity upon request. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table IA and shall apply over the full case operating t

40、emperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are described in table IA. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer

41、s PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classe

42、s Q and V shall be in accordance with MIL-PRF-38535. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required f

43、rom a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for

44、 device classes Q and V, the requirements of MIL-PRF-38535 and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 shall be provided with each lot of microcircuits delivered to this drawing. Provided by IHSNot for ResaleNo repr

45、oduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96540 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL J SHEET 6 DSCC FORM 2234 APR 97 TABLE IA. Electrical performance characteristics. Test Symbol Test conditions 1/ 2/ -55C TC +12

46、5C Unless otherwise specified Device type VDDGroup A subgroups Limits 3/ Unit Min Max High level input voltage VIH02, 03 3.0 V 1, 2, 3 2.1 V All 4.5 V 1, 2, 3 3.15 All 5.5 V 1, 2, 3 3.85 Low level input voltage VIL02, 03 3.0 V 1, 2, 3 0.9 V All 4.5 V 1, 2, 3 1.35 All 5.5 V 1, 2, 3 1.65 High level ou

47、tput voltage VOHFor all inputs affecting output under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSSIOH= -100 A 02, 03 3.0 V 1, 2, 3 2.75 V For all inputs affecting output under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSSIOH= -100 A All 4.5 V 1, 2, 3 4.25 V Low level output volt

48、age VOLFor all inputs affecting output under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSSIOL= +100 A 02, 03 3.0 V 1, 2, 3 0.25 V For all inputs affecting output under test, VIN= VDDor VSSFor all other inputs VIN= VDDor VSSIOL= +100 A All 4.5 V 1, 2, 3 0.25 V Input current high IIHFor input under test, VIN= VDDFor all other inputs VIN= VDDor VSSAll 5.5 V 1, 2, 3 +1.0 A Input current low IILFor input under test, VI