DLA SMD-5962-88501 REV H-2012 MICROCIRCUIT DIGITAL CMOS 16-BIT MICROPROCESSOR MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Technical changes were made in table I, Editorial changes throughout. 90-08-15 William K. Heckman B Changes in accordance with NOR 5962-R023-92. 91-10-30 Monica L.Poelking C Changes in accordance with NOR 5962-R189-93. 93-07-07 Joe Dupay D Add de

2、vices 03, 04, 05, and 06. Editorial changes throughout. 94-11-26 Monica L.Poelking E Changes in accordance with NOR 5962-R001-01. - LTG 00-12-21 Thomas M. Hess F Update boilerplate to the requirements of MIL-PRF-38535. Editorial changes throughout. - TVN 01-12-03 Thomas M. Hess G Update boilerplate

3、to current MIL-PRF-38535 requirements. - CFS 07-06-26 Thomas M. Hess H Update boilerplate to current MIL-PRF-38535 requirements. - PHN 12-04-16 Thomas M. Hess REV H H H H H H H SHEET 35 36 37 38 39 40 41 REV H H H H H H H H H H H H H H H H H H H H SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 3

4、0 31 32 33 34 REV STATUS OF SHEETS REV H H H H H H H H H H H H H H SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Tim Noh DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS

5、AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A CHECKED BY Tim Noh APPROVED BY William K.Heckman MICROCIRCUIT, DIGITAL, CMOS, 16-BIT MICROPROCESSOR, MONOLITHIC SILICON DRAWING APPROVAL DATE 89-02-16 REVISION LEVEL H SIZE A CAGE CODE 67268 5962-88501 SHEET 1 OF 41 DSCC FORM 2233 APR 97 5962-E316-1

6、2 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88501 REVISION LEVEL H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two p

7、roduct assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance

8、(RHA) levels is reflected in the PIN. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-88501 01 Y X Drawing number Device type Case outline Lead finish (see 1.2.2) (see 1.2.4) (see 1.2.5) 1.2.1 RHA designator. Device classes Q and V RHA marked devices

9、 meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s).

10、The device type(s) identify the circuit function as follows: Device type Generic number Frequency Circuit function 01 M80C186 10 MHz 16-bit CHMOS microprocessor 02 M80C186 12.5 MHz 16-bit CHMOS microprocessor 03 M80C186XL 20 MHz 16-bit CHMOS microprocessor 04 M80C186XL 16 MHz 16-bit CHMOS microproce

11、ssor 05 M80C186XL 12.5 MHz 16-bit CHMOS microprocessor 06 M80C186XL 10 MHz 16-bit CHMOS microprocessor 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certif

12、ication to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter

13、Descriptive designator Terminals Package style Y See figure 1 68 Ceramic quad flatpack Z CMGA3-P68 68 Pin grid array 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reprodu

14、ction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88501 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. Voltage on any pin (referenced to GND) -1.0 V dc to +7.0 V

15、dc Maximum power dissipation (PD) . 1 W Storage temperature range -65C to +150C Thermal resistance, junction-to-case (JC): Case Y 13C/W Case Z See MIL-STD-1835 Junction temperature (TJ) . +150C Lead temperature (soldering, 5 seconds) . +260C 1.4 Recommended operating conditions. Supply voltage range

16、 (VCC): Device types 01, 02 4.75 V dc to 5.25 V dc Device types 03 - 06 . 4.5 V dc to 5.5 V dc Frequency of operation: Device type 01 10 MHz Device type 02 12.5 MHz Device type 03 20 MHz Device type 04 16 MHz Device type 05 12.5 MHz Device type 06 10 MHz Case operating temperature range (TC) . -55C

17、to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or

18、contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE H

19、ANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, B

20、uilding 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific e

21、xemption has been obtained. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88501 REVISION LEVEL H SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 It

22、em requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 as specified herein, or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as describe

23、d herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in

24、 MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 and figure 1 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3

25、 Functional block diagram. The functional block diagram shall be as specified on figure 3. 3.2.4 Timing waveforms. The timing waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as

26、specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. The part shall be marked

27、 with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, th

28、e RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devic

29、es built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. For product built in accordance with A.3.2.2 of MIL-PRF-38535, or as modified in t

30、he manufacturers QM plan, the “QD” certification mark shall be used in place of the “Q“ or “QML“ certification mark. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.7 herein)

31、. The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of confor

32、mance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land

33、 and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or

34、 networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88501 REVISION LEVEL H SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless o

35、therwise specified Device type Group A subgroups Limits Unit Min Max Low level input voltage, except X1 VILAll 1, 2, 3 -0.5 0.2VCC-0.3 V High level input voltage, all except X1, RES VIH101, 02 1, 2, 3 0.2VCC+1.1 VCC+0.5 V 03-06 0.2VCC+0.9 VCC+0.5 High level input voltage, at RES VIH2All 1, 2, 3 3.0

36、VCC+0.5 V High level input voltage, at ARDY/SRDY VIH301, 02 1, 2, 3 0.2VCC+1.3 VCC+0.5 V Low level output voltage VOLIOL= 2.5 mA for S0 - S2 IOL= 2.0 mA for all other outputs All 1, 2, 3 0.45 V High level output voltage VOHIOH= -200 A at 0.8VCC 01, 02 1, 2, 3 0.8VCCVCC2/ V IOH= -200 A at VCC 0.5 V 0

37、3-06 VCC-0.5 VCC 2/ IOH= -2.4 mA at 2.4 V All 2.4 VCC2/ Power supply current 3/ ICCVCC= Max 4/ 01 1, 2, 3 140 mA 02 160 03 100 04 90 05 80 06 70 Input leakage current IIL0.45 V VIN VCCAll 1, 2, 3 10 A Output leakage current IOL0.45 V VOUT VCC5/ At 0.5 MHz All 1, 2, 3 10 A Low level clock output volt

38、age VCLOICLO= 4.0 mA01, 02 1, 2, 3 0.5 V 03-06 0.45 High level clock output voltage VCHOICHO= -500 A01, 02 1, 2, 3 0.8VCCV 03-06 VCC-0.5 Low level clock input voltage (X1) VCLIAll 1, 2, 3 -0.5 +0.6 V High level clock input voltage (X1) VCHIAll 1, 2, 3 3.9 VCC+0.5 V See footnotes at end of table. Pro

39、vided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88501 REVISION LEVEL H SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Con

40、tinued. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Device type Group A subgroups Limits Unit Min Max Input capacitance CINSee 4.3.1c f = 1 MHz All 4 10 pF I/O capacitance CIO20 Functional test See 4.3.1d All 7, 8 Data in set-up (A/D) tDVCLSee figure 4 01, 02 9, 10, 11 20 ns 0

41、3 10 04-06 15 Data in hold (A/D) tCLDX01, 02 9, 10, 11 5 ns 03-06 3 ARDY resolution transition set-up time 6/ tARYCH01, 02 9, 10, 11 20 ns 03 10 04-06 15 Asynchronous ready (ARDY) set-up time tARYLCL01, 02 9, 10, 11 30 ns 03 15 04-06 25 ARDY active hold time tCLARX01, 02 9, 10, 11 15 ns 03 10 04-06

42、15 ARDY inactive hold time tARYCHL01, 02 9, 10, 11 15 ns 03 10 04-06 15 Synchronous ready (SRDY) transition set-up time tSRYCL01, 02 9, 10, 11 20 ns 03 10 04-06 15 SRDY transition hold time tCLSRY01, 02 9, 10, 11 20 ns 03 10 04-06 15 Hold set-up 6/ tHVCL01, 02 9, 10, 11 20 ns 03 10 04-06 15 See foot

43、notes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88501 REVISION LEVEL H SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical perform

44、ance characteristics - Continued. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Device type Group A subgroups Limits Unit Min Max INTX, NMI, TEST , TMRIN set-up time 6/ tINVCHSee figure 4 01, 02 9, 10, 11 20 ns 03 10 04-06 15 DRQ0, DRQ1 set-up time 6/ tINVCL01, 02 9, 10, 11 20 n

45、s 03 10 04-06 15 Address valid delay tCLAV01 9, 10, 11 5 50 ns 02 5 37 03 1 27 04 1 33 05 3 36 06 3 44 Address hold tCLAX01, 02 9, 10, 11 0 ns 03-06 0 2/ Address float delay tCLAZ01 9, 10, 11 tCLAX30 ns 02 tCLAX25 03-04 tCLAX20 05 tCLAX25 06 tCLAX30 Command lines float delay tCHCZ01 9, 10, 11 40 ns

46、02 33 03 25 04 28 05 33 06 40 Command lines valid delay (after float) tCHCV01 9, 10, 11 45 ns 02 37 03 26 04 32 05 36 06 44 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DEFENSE SUPPLY CE

47、NTER COLUMBUS COLUMBUS, OHIO 43218-3990 SIZE A 5962-88501 REVISION LEVEL H SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Device type Group A subgroups Limits Unit Min Max ALE width tLHLLSe

48、e figure 4 01, 02 9, 10, 11 tCLCL-30 ns 03-06 tCLCL-15 ALE active delay tCHLH01 9, 10, 11 30 ns 02 25 03-04 20 05 25 06 30 ALE inactive delay tCHLL01 9, 10, 11 30 ns 02 25 03-04 20 05 25 06 30 Address hold to ALE inactive tLLAXSee figure 4 01 9, 10, 11 tCHCL-20 ns 02 tCHCL-15 Equal loading See figure 4 03 tCHCL-10 04-06 tCHCL-15 Data valid delay tCLDVSee figure 4 01 9, 10, 11 5 40 ns 02 5 36 03 1 27 04 1 33 05 3 36 06 3 40 Data hold time tCLDOX01, 02 9, 10, 11 3 ns 03, 04 1 05, 06 3 Data hold after WR (min) tWHDXSee figure 4 01 9, 10, 11 tCLCL-34 ns 02 tCLCL-20 Equal loading See