DLA DSCC-VID-V62 09646-2010 MICROCIRCUIT LINEAR FAIL SAFE RS-485 RS-422 TRANSCEIVER MONOLITHIC SILICON.pdf
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1、 REVISIONSLTR DESCRIPTION DATE APPROVEDPrepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM
2、-DD CHECKED BY RAJESH PITHADIA TITLE MICROCIRCUIT, LINEAR, FAIL SAFE, RS-485/RS-422 TRANSCEIVER, MONOLITHIC SILICON 10-01-26 APPROVED BY CHARLES F. SAFFLE SIZE A CODE IDENT. NO. 16236 DWG NO. V62/09646 REV PAGE 1 OF 14 AMSC N/A 5962-V003-10 Provided by IHSNot for ResaleNo reproduction or networking
3、permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09646 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a +3.3 V, fail safe, RS-485/RS-422 transceiver microcircuit, with an operating tempera
4、ture range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/09646 - 01 X B Drawing Device t
5、ype Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 1/ MAX3077EMSA/PR +3.3 V fail safe RS-485 / RS-422 transceiver 02 2/ MAX3077EMSA/PR2 +3.3 V fail safe RS-485 / RS-422 transceiver 1.2.2 Case outline(s). The case outl
6、ine(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 8 MS-012-AA Plastic small outline1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-le
7、ad plateC Gold plateD PalladiumE Gold flash palladium Z Other _ 1/ Device type 01 100% burn-in and 100% testing at room, hot, and cold temperatures. 2/ Device type 02, 100% testing at room, hot, and cold temperatures. Provided by IHSNot for ResaleNo reproduction or networking permitted without licen
8、se from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09646 REV PAGE 3 1.3 Absolute maximum ratings. 3/ 4/ Supply voltage (VCC) . +6 V Driver input voltage (DI) . -0.3 V to +6 V Driver output voltage (Z, Y) -8 V to +13 V Receiver input voltage (A, B)
9、-8 V to +13 V Receiver output voltage (RO) . -0.3 V to (VCC+ 0.3 V) Driver output current 250 mA Junction temperature (TJ) +150C Storage temperature range (TSTG) -65C to +150C Lead temperature (soldering, 10 seconds) . +300C 1.4 Recommended operating conditions. 5/ Supply voltage range (VCC) . +3.3
10、V 10% Operating free-air temperature range (TA) . -55C to +125C 1.5 Thermal data table. Case outline letter X X Unit PC board Single layer Multi-layer 6/ Power dissipation (PD), maximum at +70C 471 606 mW Power dissipation (PD) derating above +70C 5.9 7.6 mW/C Thermal resistance, junction to case (J
11、C) 40 38 C/W Thermal resistance, junction to ambient (JA) 170 132 C/W 3/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicate
12、d under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 4/ All voltages referenced to GND. 5/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk.
13、 The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 6/ Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board. For detailed information on package thermal consi
14、derations, refer to www.maxim- Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09646 REV PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlin
15、es for Semiconductor Devices JEDEC JESD51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Applications for copies should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIR
16、EMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the
17、manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The
18、design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Truth table. The truth table shall be as shown
19、in figure 3. 3.5.4 Driver DC test load. The driver DC test load shall be as shown in figure 4. 3.5.5 Driver timing test circuit. The driver timing test circuit shall be as shown in figure 5. 3.5.6 Driver propagation delay waveforms. The driver propagation delay waveform shall be as shown in figure 6
20、. 3.5.7 Receiver timing test circuit. The receiver timing test circuit shall be as shown in figure 7. 3.5.8 Receiver propagation delay waveforms. The receiver propagation delay waveforms shall be as shown in figure 8. Provided by IHSNot for ResaleNo reproduction or networking permitted without licen
21、se from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/09646 REV PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions 2/ VCC= 3.3 V 10% unless otherwise specifiedTemperature, TA Device type Limits Unit Min Max Driver sectio
22、n. Differential driver output VODRL= 100 (RS422), see figure 4 -55C to +125C 01, 02 2 VCCV RL= 54 (RS485), see figure 4 1.5 VCCNo load VCCChange in magnitude of differential output voltage VODRL= 100 or 54 , 3/ see figure 4 -55C to +125C 01, 02 0.2 V Driver common mode output voltage VOCRL= 100 or 5
23、4 , see figure 4 -55C to +125C 01, 02 3 V Change in magnitude of common mode voltage VOCRL= 100 or 54 , 3/ see figure 4 -55C to +125C 01, 02 0.2 V Input high voltage VIHDI -55C to +125C 01, 02 2 V Input low voltage VILDI -55C to +125C 01, 02 0.8 V Input hysteresis VHYSDI, VCC= 3.3 V +25C 01, 02 100
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