DLA DSCC-VID-V62 06617 REV A-2012 MICROCIRCUIT LINEAR DUAL OUTPUT LOW DROPOUT VOLTAGE REGULATOR MONOLITHIC SILICON.pdf
《DLA DSCC-VID-V62 06617 REV A-2012 MICROCIRCUIT LINEAR DUAL OUTPUT LOW DROPOUT VOLTAGE REGULATOR MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA DSCC-VID-V62 06617 REV A-2012 MICROCIRCUIT LINEAR DUAL OUTPUT LOW DROPOUT VOLTAGE REGULATOR MONOLITHIC SILICON.pdf(13页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - ro 12-10-15 C. SAFFLE CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE
2、 REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY RICK OFFICER DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY TOM HESS TITLE MICROCIRCUIT, LINEAR, DUAL OUTPUT, LOW DROPOUT, VOLTAG
3、E REGULATOR, MONOLITHIC SILICON 06-03-22 APPROVED BY RAYMOND MONNIN SIZE A CODE IDENT. NO. 16236 DWG NO. V62/06617 REV A PAGE 1 OF 13 AMSC N/A 5962-V008-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO
4、 SIZE A CODE IDENT NO. 16236 DWG NO. V62/06617 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance dual output, low dropout, voltage regulator microcircuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative
5、 Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/06617 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.
6、2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 TPS767D301-EP Dual output, low dropout, voltage regulator 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 28 MO-153 Plastic small outline with thermal pad
7、 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking
8、 permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06617 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ Input voltage range (VI) -0.3 V to 13.5 V 2/ Input voltage range (VI) : 1IN, 2IN, EN pins -0.3 V to VI+ 0.3 V Output volt
9、age (VO) : 1OUT, 2OUT pins 7 V RESET pin 16.5 V Peak output current Internally limited Electrostatic discharge (ESD) rating: Human body model (HBM) . 2 kV Continuous total power dissipation (PD) See dissipation rating table Operating virtual junction temperature range (TJ) -55C to +150C Storage temp
10、erature range (TSTG) -65C to +150C 1.4 Recommended operating conditions. 3/ Input voltage range (VI): 1IN, 2IN pins 2.7 V to 10 V 4/ Output current for each LDO 0 to 1 A 5/ Output voltage range (VO) : 1OUT, 2OUT pins 1.5 V to 5.5 V Operating virtual junction temperature (TJ) -55C to +125C 1.5 Dissip
11、ation rating table. 6/ Package Air flow (CFM) TA 25C power rating Derating factor above TA= 25C TA= 70C power rating TA= 85C power rating X 0 3.58 W 3.58C/W 1.97 W 1.43 W 250 5.07 W 5.07C/W 2.79 W 2.03 W 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to th
12、e device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ All vo
13、ltage values are with respect to network ground terminal. 3/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 4/ To calculat
14、e the minimum input voltage for maximum output current, use the following equation: VI(min)= VO(max)+ VDO(max load). 5/ Continuous output current and operating junction temperature are limited by internal protection circuitry, but it is not recommended that the device operate under conditions beyond
15、 those specified in this paragraph for extended periods of time. 6/ This parameter is measured with the recommended copper heat-sink pattern on a four layer printed circuit board (PCB), 1 ounce copper on 4 inch x 4 inch ground layer. For more information, refer to manufacturer technical brief litera
16、ture number SLMA002. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06617 REV A PAGE 4 2. APPLICABLE DOCUMENTS JEDEC Solid State Technology Association JEDEC PUB
17、95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to the JEDEC Office, 3103 North 10th Street, Suite 240-S, Arlington, VA 22201-2107 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked w
18、ith the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) ab
19、ove. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified here
20、in. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. 3.5.3 Block diagram. The block diagram shall be as shown in figure 3. 3.5.4 Timing waveforms. The timing waveforms shall
21、 be as shown in figure 4. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/06617 REV A PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Condit
22、ions 2/Temperature, TJ Device type Limits Unit Min Max Output voltage 3/ VO1.5 V VO 5.5 V, -55C to +125C 01 0.97VO1.02VOV (adjustable) 10 A IO 1 A Output voltage 3/ VO4.3 V VI 10 V, -55C to +125C 01 3.201 3.366 V (3.3 V output) 10 A IO 1 A Quiescent current 3/ (GND current) for each LDO IO= 1 A -55C
23、 to +125C 01 125 A Output voltage 3/ 4/ line regulation for each LDO VO/ VOVO+ 1 V VI 10 V +25C 01 0.01 typical %/V Output noise voltage BW = 200 Hz to 100 kHz, VO= 1.8 V, IC= 1 A, CO= 10 F +25C 01 55 typical VRMSOutput current limit for each LDO VO= 0 V -55C to +125C 01 2 A Thermal shutdown junctio
- 1.请仔细阅读文档,确保文档完整性,对于不预览、不比对内容而直接下载带来的问题本站不予受理。
- 2.下载的文档,不会出现我们的网址水印。
- 3、该文档所得收入(下载+内容+预览)归上传者、原创作者;如果您是本文档原作者,请点此认领!既往收益都归您。
下载文档到电脑,查找使用更方便
10000 积分 0人已下载
下载 | 加入VIP,交流精品资源 |
- 配套讲稿:
如PPT文件的首页显示word图标,表示该PPT已包含配套word讲稿。双击word图标可打开word文档。
- 特殊限制:
部分文档作品中含有的国旗、国徽等图片,仅作为作品整体效果示例展示,禁止商用。设计者仅对作品中独创性部分享有著作权。
- 关 键 词:
- DLADSCCVIDV6206617REVA2012MICROCIRCUITLINEARDUALOUTPUTLOWDROPOUTVOLTAGEREGULATORMONOLITHICSILICONPDF

链接地址:http://www.mydoc123.com/p-689226.html