ARMY MIL-M-49241A-1987 MULTIPLEXER TD-1236 G.pdf

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1、MIL-M-4724LA 5 W 7779706 0362033 7 = n 15 June 1987 SUPERSEDING MIL-M-49241 (CR) 17 November 1981 MILITARY SPECIFICATION MULTIPLEXER, TD-l236/G Th?is specification is approved for use within the Communications- Electronics Command, Department of the Army, and is available for use by all Departments

2、and Agencies of the Department of Defense. 1. SCOPE 1.1 Scope. This specification covers the design, fabrication and testing necessary for the manufacture of the Multiplexer, TD- 1236/G. This unit is one of the electronic units that comprise the Digital Group Multiplexer (DGM) family of cable system

3、 equipment developed by the Joint Tactical Command, Control and Communica- tions Agency (JTC3A, formerly TRI-TAC). See 6.1 for intended use and functional description of the unit. Beneficial comments (recommendations, additions, deletions) and any pertinent data which may be of use in improving this

4、 document should be addressed to Commander, US Army Communications- Electronics Command, ATTN: AMSEL-ED-LC, Fort Monmouth, New Jersey 07703 by using the self-addressed Standardization Document Improvement Proposal (DD Form 1426) appearing at the end of this document or by letter. - - 5-.c_I- - - -_-

5、 - AMSC No. N/A FSC 5820 Distribution Statement A. Approved for public release; distri- bution is unlimited. THIS DOCUMENT CONTAINS y3 PAGES. Copyright Communications - Electronics Command Provided by IHS under license with CRAINot for ResaleNo reproduction or networking permitted without license fr

6、om IHS-,-,-MIL-M-47243A 58 E 7777706 0362034 7 MIL-M-4 9 2 4 1A (CR) 1) 2. APPLICABLE DOCUMENTS 2.1 Government documents. 2.1.1 Specifications, standards, and handbooks. Unless other- n wise specified, the following specifications, standards, and hand- books of the issue listed in that issue of the

7、Department of in the solicitation form a part of this specification to the extent specified herein. Defense Index of Specifications and Standards (DoDISS) specified L9 SPECIFICATIONS Military MIL-P-116 MIL-P-11268 MIL-M-13231 MIL-F-14072 MIL-E-5 5 5 8 5 STANDARDS Military MIL-STD-105 MIL-STD-252 MIL

8、-STD-454 MIL-STD-461A Notice 4 MIL-STD-462 Notice 3 Preservation-packaging, Methods of Parts, Materials, and Processes Used in Electronic Equipment Marking of Electronic Items Finishes for Ground Electronic Equipment Electronics Equipment and Parts, Packaging of Sampling Procedures and Tables for In

9、spection by Attributes Classification of Visual and Mech- anical Defects for Equipment Electronic, Wired and Other De- vices Standard General Requirements for Electronic Equipment Electromagnetic Interference Charac- teristics Requirements for Equip- ment Electromagnetic Interference Charac- eristic

10、s Measurements of 2 Copyright Communications - Electronics Command Provided by IHS under license with CRAINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-, MIL-M-LI72LI1A 58 9779906 0162035 O W ,. L MI L-M- 4 9 2 4 1A (CR) MIL-STD-781C Reliability Tests, Exponentia

11、l Dis- MIL-STD-810D Environmental Test Methods and MIL-STD-1332 Definitions of Tactical, Prime, Pre- t r ibu t ion Engineering Guidelines cise, and Utility Terminologies for Classification of the DOD Mobile Electric Power Engine Ger- erator Set Family MIL-STD-2073-2 Packaging Requirement Codes MIL-S

12、TD-45662 Calibration System Requirements J 2.1.2 Other Government documents, drawinqs, and publi- cations. The following other Government documents, drawings, and publications form a part of this specification to the extent specified herein. SPECIFICATIONS Communications-Electronics Command CR-CX-01

13、7 3-0 0 1 Nuclear Survivability/Vulnerability for the Family of Digital Group Mulitplexer Equipments CR-CX-0174-001 TEMPEST for the Family of Digital Group Multiplexer Equipment Joint Tactical Command, Control and Communications Agency Interface Control Framing and Synchronization Protocol Document

14、ICD-003 DRAWINGS Communications-Electronics Command DL-SM-B-875929 SM-D-884544 SM-D-875942 SM-D-875944 SM-D-875945 SM-D-875948 SM-D-876006 SM-D-884528 SM-D-876269 SM-D-884567 SM-D-884579 SM-D-884593 Multiplexer TD-1236/G Circuit Card Assembly (CCA), Group CCA, Timing CCA, Super Group A CCA, Microcon

15、troller CCA, Super Group Timing CCA, Fi 1 ter Assembly CCA, Super Group B CCA, Multi VDC CCA, AC Input MUX/DEMUX CCA, BITE 1 CCA, 5 VDC 3 Copyright Communications - Electronics Command Provided by IHS under license with CRAINot for ResaleNo reproduction or networking permitted without license from I

16、HS-,-,-MIL-M-4924LA 58-= 9999906 OLb2036 2 9 MIL-M-4 9 24 1A (CR) (Copies of specifications, standards, handbooks, drawings, publications and other Government documents required by manufacturers in connection with specific acquisition functions should be obtained from the contracting activity.) 2.2

17、Order of precedence. In the event of a conflict between the text of this specification and the references cited herein (except for associated detail specifications, specification sheets or MS standards), the text of this specification shall take precedence. Nothing in this specification, however, sh

18、all supersede applicable laws and regulations unless a specific exemption has been obtained. 4 Copyright Communications - Electronics Command Provided by IHS under license with CRAINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-4921A 58 m 7779706 0162037 m M

19、IL-M-4 9 24 1A (CR) 3. REQUIREMENTS 3.1 First article units. When specified in the contract or purchase order, the contractor shall furnish first article units in accordance with 4.3. 3.2 Construction. 3.2.1 Fabrication. The TD-l236/G shall be constructed in accordance with the requirements of this

20、specification and of DL- SM-B-875929, including the requirements for parts, materials and processes therein. 3.2.2 Printed wirinq. The printed wiring shall meet the re- quirements of MIL-STD-454, Requirement 17. 3.2.3 Semiconductor devices and inteqrated circuits. The semiconductor devices and integ

21、rated circuits shall meet the requirements of MIL-STD-454, Requirements 30 and 64. e 3.3 Parts, materials, and processes-qeneral. In addition to the requirements of this specification, the requirements of MIL- P-11268 including the selection requirements therein shall apply. 3.4 Finish. The equipmen

22、t shall be %hished in accordance with MIL-F-14072 and the equipment drawing DL-SM-B-875929. 3.5 Markinq. The marking shall conform to MIL-M-13231, with . approvals in accordance with requirements specified in the contract or purchase order. 3.5.1 Serial numbers. (See 4.16) Serial numbers are require

23、d on each nomenclatured item including Circuit Card Assemblies (CCAs). The numbers shall be consecutively assigned. 3.6 Electrical preconditioninq (burn-in). (See 4.6) Prior to submission to the specified quality conformance inspections, each assembled equipment shall be electrically preconditioned

24、for a 5 c Copyright Communications - Electronics Command Provided by IHS under license with CRAINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M- 49 2 4 1A (CR) minimum of 48 hours operating time. The last 24 hours of electrical preconditioning shall be failur

25、e free. Each unit fabricated shall be subjected to this process. Failure free is defined as (1) no built-in test equipment (BITE) alarms during burn-in and (2) the successful completion of the operational check of 4.7.7 after burn-in. 3.7 Electrical. (See 4.7) 3.7.1 Balanced equipment-side siqnal ch

26、aracteristics. 3.7.1.1 Line-to-line voltage levels. (See 4.7.1.1) The line- to-line voltaqe shall be between +0.1 and +4.0 volts for a digital I, ad between -0.1 and -4.0 volts for a digital O, measured into a 100 ohm dummy load. 3.7.1.2 Line-to-ground voltaqe. (See 4.7.1.2) The magnitude of the lin

27、e-to-ground voltage shall not exceed 3 volts. 3.7.1.3 Clock/data phasing. (See 4.7.1.3) For those data signals having a related clock signal, the time difference between the upward transition of the clock signal and either the upward or downward transition of the data signal shall be no more than 20

28、 ns for group rate signals. Times shall be measured at the zero voltage point of the signals. 3.7.1.4 Offset. (See 4.7.1.4) The magnitude of the offset voltage measured between the center tap of a 100 ohm dummy load and ground shall not be.greater than 3 volts. 6 Copyright Communications - Electroni

29、cs Command Provided by IHS under license with CRAINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-LI724LA 5 799970b 0362039 8 W MIL-M- 4 9 2 4 1A ( CR) 3.7.1.5 Siqnal balance. (See 4.7.1.5) The magnitude of the difference between the magnitudes of the digital

30、 1 level and the digital O level shall be less than 10% of the larger of the two. 3.7.1.6 Slew rate. (See 4.7.1.6) When 100 feet of RG-l08A/U cable terminated in a 78 ohm dummy load is connected to the driver output, the transition between 240 mV (either direction) shall take no more than 10 ns for

31、group rate signals. 3.7.1.7 Receiver dynamic ranqe. (See 4.7.1.7) The receiver shall deliver the proper digital output when a line-to-line voltage of +50 mV for a digital 1 or -50 mV for a digital O is applied to the receiver input terminals. 3.7.1.8 Input load impedance. (See 4.7.1.8) The input imp

32、edance shall be 100 ohms tio%. 3.7.1.9 Clock asymmetry. (See 4.7.1.9) The positive half of the clock waveform shall be equal to half the period 215 ns for group rate timing signals. 3.7.1.10 External clock/data phasinq. (See 4.7.1.10) The phase relationship between the station clock input or the Sup

33、er Group related timing input (depending on the timing option selected) and the Super Group data output shall be such that the negative to positive transition of the input shall be led by the output data transitions by 62.3 +40.6 ns 53 1/2% of a bit interval. e - 3.7.2 Control siqnals. (See 4.7.2) 3

34、.7.2.1 Resync command, waveform parameters. (See 4.7.2.1) The resync command shall be put out by the multiplexer as a balanced pulse signal. This signal shall have an idling level line-to-line between -0.3 and -3.0 volts. When resync is necessary, it shall rise to between +0,3 and +3.0 volts line-to

35、- line. These voltages shall be measured into a 6k ohm load. The rise and fall time 10 to 90% shall be less than 3 microseconds and the pulse width shall be greater than 10 microseconds. The TD-l236/G shall be capable of initiating individual and concur- rent cryptographic resynchronizations with in

36、terfacing KG-81s (TEDS) on any of its group ports and its Super Group port. 7 c Copyright Communications - Electronics Command Provided by IHS under license with CRAINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-49 24 IA (CR) 3.7.2.2 Frame squelch interface

37、. (See 4.7.2.2) The multi- plexer shall accept a frame squelch signal. When nothing is connected, the multiplexer is permitted to search for frame. When the applied voltage is between +2 and +5V, the multiplexer is permitted to search for frame. When the voltage applied is between +O and +0.8V, the

38、multiplexer is inhibited from searching for frame. 3.7.3 Multiplexing. (See 4.7.3) The multiplexer shall be capable of multiplexing groups into a Super Group in the combinations shown in tables I, II and III. A 2 kb/s telemetry I. channel shall be multiplexed with the groups. TABLE I. TD-l236/G grou

39、p rates. Input Bit Rates (kb/s) Output Bit - . . . - - . - . 2048 .L;- _-_a_I . .-.-.-.*C ,* i -. - L Format input #2 i Input #3 Input #4 1 Rate (kb/s) E Switch 2304 O 1152 i 1152 288-1152 i 0,288-576 0,288-576 4608 1152 288-1152 I 0,288-1152 i 4608 576 i 576 288-576 1 4608 1 O i 2304 O 2304 ._-I- -

40、 1 I I O I 4608 i 3 (Al) O 4608.?./ ! l (B) -I- 1 2 (A3) i I I 1 1 i i 1152 I 576 576 I 1 -_- -_- t-7 * *The overhead and traffic bit relationship shall be identical to the input overhead and traffic bit relationship. NOTES : 1. X-Y means X or Y or any standard intermediate bit rate; e.g., 128- 1024

41、 means 128, 256, 512 or 1024. 2, For .the 512, 512, 512, O kb/s input bit rate combination, both 2048 and 1536 kb/s output rates are applicable, and the required output rate shall be switch selectable. 3. 128 kb/s input group rate will only be utilized with a 16 kb/s channel rate. 4. With 16 kb/s ch

42、annels, the maximum output bit rate is 2048 kb/s (128 channels), and the maximum input bit rate is 1024 kb/s (64 channels). 9 c Copyright Communications - Electronics Command Provided by IHS under license with CRAINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-TAB

43、LE II. TD-l236/G qroup rates (Continued). y-.“p. . . I input #i 1152 576 . 576 . 576 576 57641 288 288 57 6 288 - - _ Input Bit Rates (kb/s) - - - . i _ . . I I Output Bit Frame I 1 Format Input #2 i input #3 i Input #4 Rate (kb/s) I Switch ._ . - -. 144-576 576 288 576 288 288 144 O 288 144,288 288

44、 . 144 14 4 144 288 :o 144 144 144 O s- .i . i -. .- I I 0,144,288 . 0,144,288 2304 i o (Cl I 144-576 288 O 288 O, 144 144,288 144 I t O O , 0,144 144 O O O 0,144,576 144-288 O O 0,144 O, 144,288 144 O O O O O O 0,144 2304 2304 1152 1152 1152 1152 1152 576“ 576 576 576 288“ 288 144“ , 2 (A3) . 2 (A3

45、) * t 3 (Al) . *The output overhead and traffic bit relationship shall be identical to the input overhead and traffic bit relationship. NOTES : 1. X-Y means X or Y or any standard intermediate bit rate; e.g., 144- 1152 means 144, 288, 576 or 1152. 2. 144 kb/s input group rate will only be utilized w

46、ith a 16 kb/s channel rate. 3. With 16 kb/s channels, the maximum output rate is 2304 kb/s (144 channels), and the maximum input bit rate is 1152 kb/s (72 channels). 4. This line restricted to 16 kb/s channel rate. 10 Copyright Communications - Electronics Command Provided by IHS under license with

47、CRAINot for ResaleNo reproduction or networking permitted without license from IHS-,-,-MIL-M-47241A 5 M 777790b 0162043 T W MIL-M-49241A (CR) TABLE III. TD-l236/G qroup rates (TD-l233/TTC operation) . - a l- Input #l - I144 f 144 B 144 1 I NOTE: Bit 16 kb/s. input #2 : Input #3 input #4 . output Fra

48、me Bit Rate Format (kb/s 1 Switch 288 (9 ch) 6 (D2) 288 (9 ch) 6 (D2) “I_ _._. .-,- -. I I 1 576 (18 ch) i 5 (Dl) 144 ! 576 (18 ch) i 5 (Dl) - _-._. _ . - . -. _, . - -_ -_- - rates reduced by a factor of two when loop rate is reduced to - i 144 1 :4: 3.7.4 Framinq. (See 4.7.4) 3.7.4.1 Frame acquisi

49、tion. (See 4.7.4.1) The frame acquisition time is defined as the period from the start of frame search until the multiplexer at each end of a link is capable of restoring traffic in both directions on the link between them. All multiplexers shall acquire frame synchronization within 50/100 ms at frame rates