ITU-T V 41-1988 CODE-INDEPENDENT ERROR-CONTROL SYSTEM《-电话网络上的数据交流 第XVII研究组 第10页》.pdf
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1、INTERNATIONAL TELECOMMUNICATION UNION)45G134 6 TELECOMMUNICATIONSTANDARDIZATION SECTOROF ITU$!4!G0G0#/-5.)#!4)/./6%2G0G04(%G0G04%,%0(/.%G0G0.%47/2+#/$%G13).$%0%.$%.4G0G0%22/2G13#/.42/,3934%-)45G134G0G0RecommendationG0G06 (Extract from the “LUEG0“OOK)NOTES1 ITU-T Recommendation V.41 was published in
2、Fascicle VIII.1 of the Blue Book. This file is an extract fromthe Blue Book. While the presentation and layout of the text might be slightly different from the Blue Book version, thecontents of the file are identical to the Blue Book version and copyright conditions remain unchanged (see below).2 In
3、 this Recommendation, the expression “Administration” is used for conciseness to indicate both atelecommunication administration and a recognized operating agency. ITU 1988, 1993All rights reserved. No part of this publication may be reproduced or utilized in any form or by any means, electronic orm
4、echanical, including photocopying and microfilm, without permission in writing from the ITU.Fascicle VIII.1 - Rec. V.41 1Recommendation V.41Fascicle VIII.1 - Rec. V.41CODE-INDEPENDENT ERROR-CONTROL SYSTEM(Mar del Plata, 1968, amended at Geneva, 1972)1 GeneralThis Recommendation is primarily intended
5、 for error control when implemented as an intermediate equipmentwhich may be provided either with data terminal equipment or with the data circuit-terminating equipment. Theappropriate interfaces are shown in Figures 1/V.41 and 2/V.41. The system is not primarily intended for use with multi-access c
6、omputing systems. The Recommendation does not exclude the use of any other error-control system that may bebetter adapted to special needs.The modems used must provide simultaneous forward and backward channels. The system uses synchronoustransmission on the forward channel and asynchronous transmis
7、sion on the backward channel. When modems toRecommendation V.23 are used with data signalling rates of 1200 or 600 bit/s in the general switched telephonenetwork, Recommendation V.5 applies, the error-control equipment being classed as communication equipment. Themargin of the synchronous receiver s
8、hould be at least 45%.The system employs block transmission of information in fixed units of 240, 480, 960 or 38401)bits and istherefore most suited to the transmission of medium or long data messages, but a fast starting procedure is incorporatedto improve the transmission efficiency for shorter me
9、ssages.Error control is achieved by means of automatic repetition of a block upon request (ARQ) from the datareceiver. If storage is provided at the receiver, detected errors can be removed before the system output (clean copy).Storage for at least two data blocks must be provided at the transmitter
10、.The forward bit stream is divided into blocks each consisting of four service bits, the information bits, and16 error-detection (or check) bits in that order, the check bits being generated in a cyclic encoder. Thus each blocktransmitted to line contains 260, 500, 980 or 38601)bits.The system will
11、detect:a) all odd numbers of errors within a block;b) any error burst not exceeding 16 bits in length and a large percentage of other error patterns.Assuming a distribution of errors as recorded in reference 1, the error-rate improvement factor has beenindicated by a computer simulation to be of the
12、 order of 50 000 for a block size of 260 bits.The fixed block system employed limits the use of the system to those lines having a loop propagation time notgreater than the figures given in Table 1/V.41. Allowances of 40 ms for total modem delay and 50 ms for the detectionof the RQ signal have been
13、made._1)This block length is suitable for circuits provided by means of geostationary orbit satellites.2 Fascicle VIII.1 - Rec. V.41TABLE 1/V.41Maximum permissible line loop propagation times (ms)Data signallingrate (bit/s)Block size(bits)2605009803860200 600 1200 2400 3600 48001 2102 4104 81019 210
14、343743154363431273277273127181183181518-49182982-141147142 Encoding and checking processThe service bits and information bits, taken in conjunction, correspond to the coefficients of a messagepolynomial having terms from xn-1(n = total number of bits in a block or sequence) down to x16. This polynom
15、ial isdivided, modulo 2, by the generating polynomial x16+ x12+ x5+ 1. The check bits correspond to the coefficients of theterms from x15to x0in the remainder polynomial found at the completion of this division. The complete block,consisting of the service and information bits followed by the check
16、bits, corresponds to the coefficients of a polynomialwhich is integrally divisible in modulo 2 fashion by the generating polynomial.At the transmitter the service bits and information bits are subjected to an encoding process equivalent to adivision by the generator polynomial. The resulting remaind
17、er is transmitted to line immediately after the informationbits, commencing with the highest order bits.At the receiver, the incoming block is subjected to a decoding process equivalent to a division by the generatorpolynomial which in the absence of errors will result in a zero remainder. If the di
18、vision results in other than a zeroremainder, errors are indicated.The above processes may conveniently be carried out by a 16-stage cyclic shift register with appropriatefeedback gates (see Figures I-1/V.41 and I-2/V.41) which is set to the all 0 position before starting to process eachblock; at th
19、e receiver the all 0 condition after processing a block indicates error-free reception.Use of scramblers - Where self-synchronizing scramblers (i.e. scramblers which effectively divide the messagepolynomial by the scrambler polynomial at the transmitter and multiply the received polynomial by the sc
20、ramblerpolynomial at the receiver) are used, in order to ensure satisfactory performance of the error-detecting system, thescrambler polynomial and the Recommendation V.41 generating polynomial must have no common factors. Where thiscondition cannot be maintained, the scrambling process must precede
21、 the error detection encoding process and thedescrambler process must follow the error detection decoding process. Where additive (i.e. non-self-synchronizing)scramblers are used, this precaution need not be observed.3 The service bits3.1 Block sequence indicationThe four service bits at the beginni
22、ng of each block transmitted to the line indicate the block sequence andconvey control information external to the message information. One of these control functions is to ensure that theinformation block order can be checked during repetitions, thus ensuring that information is not lost, gained or
23、transposed. Three block sequence indicators A, B and C are used cyclically in that order.Fascicle VIII.1 - Rec. V.41 3Once a sequence indicator has been attached to an information block it remains with that block until the block isreceived correctly. Examination of the sequence indication is an addi
24、tional part of the checking process.3.2 Allocation of service bitsThe allocation of the 16 possible combinations of the four service bits is given in Tables 2/V.41 and 3/V.41.Table 2/V.41 lists essential and therefore mandatory combinations and Table 3/V.41 optional combinations.TABLE 2/V.41Essentia
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- ITUTV411988CODEINDEPENDENTERRORCONTROLSYSTEM 电话 网络 数据 交流 XVII 研究 10 PDF

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