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    ITU-T V 41-1988 CODE-INDEPENDENT ERROR-CONTROL SYSTEM《-电话网络上的数据交流 第XVII研究组 第10页》.pdf

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    ITU-T V 41-1988 CODE-INDEPENDENT ERROR-CONTROL SYSTEM《-电话网络上的数据交流 第XVII研究组 第10页》.pdf

    1、INTERNATIONAL TELECOMMUNICATION UNION)45G134 6 TELECOMMUNICATIONSTANDARDIZATION SECTOROF ITU$!4!G0G0#/-5.)#!4)/./6%2G0G04(%G0G04%,%0(/.%G0G0.%47/2+#/$%G13).$%0%.$%.4G0G0%22/2G13#/.42/,3934%-)45G134G0G0RecommendationG0G06 (Extract from the “LUEG0“OOK)NOTES1 ITU-T Recommendation V.41 was published in

    2、Fascicle VIII.1 of the Blue Book. This file is an extract fromthe Blue Book. While the presentation and layout of the text might be slightly different from the Blue Book version, thecontents of the file are identical to the Blue Book version and copyright conditions remain unchanged (see below).2 In

    3、 this Recommendation, the expression “Administration” is used for conciseness to indicate both atelecommunication administration and a recognized operating agency. ITU 1988, 1993All rights reserved. No part of this publication may be reproduced or utilized in any form or by any means, electronic orm

    4、echanical, including photocopying and microfilm, without permission in writing from the ITU.Fascicle VIII.1 - Rec. V.41 1Recommendation V.41Fascicle VIII.1 - Rec. V.41CODE-INDEPENDENT ERROR-CONTROL SYSTEM(Mar del Plata, 1968, amended at Geneva, 1972)1 GeneralThis Recommendation is primarily intended

    5、 for error control when implemented as an intermediate equipmentwhich may be provided either with data terminal equipment or with the data circuit-terminating equipment. Theappropriate interfaces are shown in Figures 1/V.41 and 2/V.41. The system is not primarily intended for use with multi-access c

    6、omputing systems. The Recommendation does not exclude the use of any other error-control system that may bebetter adapted to special needs.The modems used must provide simultaneous forward and backward channels. The system uses synchronoustransmission on the forward channel and asynchronous transmis

    7、sion on the backward channel. When modems toRecommendation V.23 are used with data signalling rates of 1200 or 600 bit/s in the general switched telephonenetwork, Recommendation V.5 applies, the error-control equipment being classed as communication equipment. Themargin of the synchronous receiver s

    8、hould be at least 45%.The system employs block transmission of information in fixed units of 240, 480, 960 or 38401)bits and istherefore most suited to the transmission of medium or long data messages, but a fast starting procedure is incorporatedto improve the transmission efficiency for shorter me

    9、ssages.Error control is achieved by means of automatic repetition of a block upon request (ARQ) from the datareceiver. If storage is provided at the receiver, detected errors can be removed before the system output (clean copy).Storage for at least two data blocks must be provided at the transmitter

    10、.The forward bit stream is divided into blocks each consisting of four service bits, the information bits, and16 error-detection (or check) bits in that order, the check bits being generated in a cyclic encoder. Thus each blocktransmitted to line contains 260, 500, 980 or 38601)bits.The system will

    11、detect:a) all odd numbers of errors within a block;b) any error burst not exceeding 16 bits in length and a large percentage of other error patterns.Assuming a distribution of errors as recorded in reference 1, the error-rate improvement factor has beenindicated by a computer simulation to be of the

    12、 order of 50 000 for a block size of 260 bits.The fixed block system employed limits the use of the system to those lines having a loop propagation time notgreater than the figures given in Table 1/V.41. Allowances of 40 ms for total modem delay and 50 ms for the detectionof the RQ signal have been

    13、made._1)This block length is suitable for circuits provided by means of geostationary orbit satellites.2 Fascicle VIII.1 - Rec. V.41TABLE 1/V.41Maximum permissible line loop propagation times (ms)Data signallingrate (bit/s)Block size(bits)2605009803860200 600 1200 2400 3600 48001 2102 4104 81019 210

    14、343743154363431273277273127181183181518-49182982-141147142 Encoding and checking processThe service bits and information bits, taken in conjunction, correspond to the coefficients of a messagepolynomial having terms from xn-1(n = total number of bits in a block or sequence) down to x16. This polynom

    15、ial isdivided, modulo 2, by the generating polynomial x16+ x12+ x5+ 1. The check bits correspond to the coefficients of theterms from x15to x0in the remainder polynomial found at the completion of this division. The complete block,consisting of the service and information bits followed by the check

    16、bits, corresponds to the coefficients of a polynomialwhich is integrally divisible in modulo 2 fashion by the generating polynomial.At the transmitter the service bits and information bits are subjected to an encoding process equivalent to adivision by the generator polynomial. The resulting remaind

    17、er is transmitted to line immediately after the informationbits, commencing with the highest order bits.At the receiver, the incoming block is subjected to a decoding process equivalent to a division by the generatorpolynomial which in the absence of errors will result in a zero remainder. If the di

    18、vision results in other than a zeroremainder, errors are indicated.The above processes may conveniently be carried out by a 16-stage cyclic shift register with appropriatefeedback gates (see Figures I-1/V.41 and I-2/V.41) which is set to the all 0 position before starting to process eachblock; at th

    19、e receiver the all 0 condition after processing a block indicates error-free reception.Use of scramblers - Where self-synchronizing scramblers (i.e. scramblers which effectively divide the messagepolynomial by the scrambler polynomial at the transmitter and multiply the received polynomial by the sc

    20、ramblerpolynomial at the receiver) are used, in order to ensure satisfactory performance of the error-detecting system, thescrambler polynomial and the Recommendation V.41 generating polynomial must have no common factors. Where thiscondition cannot be maintained, the scrambling process must precede

    21、 the error detection encoding process and thedescrambler process must follow the error detection decoding process. Where additive (i.e. non-self-synchronizing)scramblers are used, this precaution need not be observed.3 The service bits3.1 Block sequence indicationThe four service bits at the beginni

    22、ng of each block transmitted to the line indicate the block sequence andconvey control information external to the message information. One of these control functions is to ensure that theinformation block order can be checked during repetitions, thus ensuring that information is not lost, gained or

    23、transposed. Three block sequence indicators A, B and C are used cyclically in that order.Fascicle VIII.1 - Rec. V.41 3Once a sequence indicator has been attached to an information block it remains with that block until the block isreceived correctly. Examination of the sequence indication is an addi

    24、tional part of the checking process.3.2 Allocation of service bitsThe allocation of the 16 possible combinations of the four service bits is given in Tables 2/V.41 and 3/V.41.Table 2/V.41 lists essential and therefore mandatory combinations and Table 3/V.41 optional combinations.TABLE 2/V.41Essentia

    25、l combinationsGroup Combination Functionabcd0011100111000101Block A sequence indicatorBlock B sequence indicatorBlock C sequence indicatorSynchronizing sequence prefixNote - The digit on the left occurs first.TABLE 3/V.41Optional combinationsGroup Combination Functionefghjklmnpqr01101000000110101011

    26、0010010001111101111011110000Hold blockEnd of transmission (this block contains no data)Start of message 1 (five-unit codes)Start of message 2 (six-unit codes)Start of message 3 (seven-unit codes)start of message 4 (eight-unit codes)End of message (this block contains no data)Data link escape (genera

    27、l control block) To be allocated by bilateral agreement4 Fascicle VIII.1 - Rec. V.413.3 Control functionsSynchronization is the only essential control function catered for in the service bits.The optional Data link escape (general control) block contains data which are special in some way agreed to

    28、bythe users.Additional optional functions are Start of message 1 (or for five-unit codes), Start of message 2 (or for six-unitcodes), Start of message 3 (or for seven-unit codes), Start of message 4 (or for eight-unit codes), End of message, andEnd of transmission.Four additional service bit combina

    29、tions are available for allocation by bilateral agreement.The message information part of the non-data blocks (Hold, End of transmission and End of message) is of nosignificance, but such blocks will still be checked at the receiver.When the optional facilities groups g to k are not used, the first

    30、data block following the OFF to ON transitionof Ready for sending is automatically prefixed Block A sequence indicator, group a. Data blocks BCABC, etc. thenfollow sequentially unless one (or more) of the other types of block are inserted.When the optional facilities groups g to k are used, the firs

    31、t data block is prefixed by one of the Start ofmessage indicators 1, 2, 3 or 4 (groups g to k), depending on the number of bits per character which will be used duringtransmission. Data blocks ABCAB, etc. then follow. Should an interruption to a leased type connection occur duringtransmission or sho

    32、uld an operator interrupt the transmission to change to the speech mode, the transmission will beresumed with the sequence indicator following that of the last block to be accepted before the interruption. A Start ofmessage indicator should not be used after such an interruption.In the case of switc

    33、hed connections, special measures may be necessary to ensure that an interrupted message isnot continued by a new message without appropriate indication.4 Correction procedureA binary 1 condition on the backward channel (the supervisory channel) indicates the need for repetition ofinformation (RQ).

    34、Conversely, a binary 0 implies acceptance of the transmitted information. The rules governing thetransmission and reception of these conditions are given in the following and 5 and 6 below.4.1 Data transmitter sequenceStarting and resynchronizing conditions are given in 5 and 6 below, only normal op

    35、erations being dealt withhere.Data are transmitted block by block, but the contents of each transmitted block together with its service bits areheld in store at the transmitter until correct reception has been ensured. Storage for at least two blocks must be provided.During transmission of a block t

    36、he condition of the backward channel (circuit 119) is monitored for a period of45-50 milliseconds immediately prior to transmission of the last check bit. If any RQ is found within this period theblock is rendered invalid by inverting this last bit. The transmitter then recommences transmission from

    37、 the beginning ofthe previous block by reference to the store. During the retransmission of the block which follows the detection of theRQ signal, the state of the backward channel is ignored.4.2 Receiver procedureIn normal operation a binary 0 is maintained on the backward channel as long as blocks

    38、 are received withcorrect check bits and permissible service combinations. Any data contained in these blocks are passed to the receiveroutput. If a clean copy output is required, data storage for at least one block should be provided since a block cannot bechecked until it has been completely recei

    39、ved.Fascicle VIII.1 - Rec. V.41 5When a block has been received which does not meet the error check condition, binary 1 is transmitted on thebackward channel and the expected service bit combination is noted in the receiver.Usually, the first received data block in the repetition cycle having correc

    40、t check bits also will have anacceptable service bit combination and any data within it will be processed. Occasionally the first block which checkscorrectly may bear an abnormal service bit combination due to a line transmission error in the backward channel(causing either a mutilated or imitated b

    41、inary 0 signal). In either case the data in this first block are discarded. In the casethat the block checks correctly but the service bit combination indicates the block preceding the expected block, a binary0 should be applied to the backward channel.If the next block checks correctly and bears an

    42、 acceptable service bit combination, its data should be processedand normal operation resumed. In the case that the service bit combination indicates an invalid block, a binary 1 shouldbe applied; moreover, if the service bit combination indicates the block following the expected block, it is implie

    43、d that abinary 0 has been imitated for the whole of the 45 ms period specified in 4.1 above and an alarm must be given since itis not possible to recover from this (rare) condition automatically.5 Starting procedures5.1 Transmitter procedures and synchronizing patternDuring the delay between Request

    44、 to send and Ready for sending, line idle conditions (binary 1) are emitted bythe modem. The first data signals, after the modem is ready for sending, are the synchronizing sequence prefix (0101),followed by the synchronizing filler, followed by the synchronizing pattern. The filler may be of any le

    45、ngth provided itincludes at least 28 transitions and does not include the synchronizing pattern. The synchronizing pattern is0101000010100101 starting from the left-hand digit (see Appendix I for a possible derivation). The 28 transitions areprovided for bit synchronization purposes. These synchroni

    46、zing signals are followed by Block A or a Start of messageblock (groups g to k in Table 3/V.41). During the whole of this sequence from the beginning of the synchronizing prefixthe transmitter ignores the condition of the backward channel, acting as though binary 0 were present. The condition ofthe

    47、backward channel then assumes its normal significance (see 4 above). Should this be binary 1 during theexamination period of the second block, this block must be completed with the last bit inverted and the startingprocedure must be recommenced from the beginning of the synchronizing sequence prefix

    48、.5.2 Receiver proceduresBinary 1 is emitted on the backward channel at the receiving terminal until the synchronizing pattern(0101000010100101) is detected, at which time binary 0 is emitted and block timing is established. The only acceptableservice bit combinations to follow the synchronizing patt

    49、ern are the Block A sequence indicator or a Start of messageindicator (when used). If other service bit combinations are received, binary 1 is returned and the search for thesynchronizing pattern is resumed.6 Resynchronization procedure6.1 Recovery of synchronizationShould the receiver fail to recognize an acceptable block within a reasonable time, then it must examine theincoming bit stream continuously to find the synchronization pattern. When this pattern is found, block timing is re-established and the binary 0 condition applied to the backward channel;


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