DLA SMD-5962-95842 REV A-2007 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS 18-BIT BUS-INTERFACE FLIP-FLOP WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON《双极互补金属氧化物半.pdf

《DLA SMD-5962-95842 REV A-2007 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS 18-BIT BUS-INTERFACE FLIP-FLOP WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON《双极互补金属氧化物半.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-95842 REV A-2007 MICROCIRCUIT DIGITAL ADVANCED BIPOLAR CMOS 18-BIT BUS-INTERFACE FLIP-FLOP WITH THREE-STATE OUTPUTS TTL COMPATIBLE INPUTS MONOLITHIC SILICON《双极互补金属氧化物半.pdf（19页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update boilerplate to MIL-PRF-38535 requirements. - LTG 07-06-21 Thomas M. Hess REV SHET REV A A A A SHEET 15 16 17 18 REV STATUS REV A A A A A A A A A A A A A A OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Joseph A. Kerb

2、y DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Thanh V. Nguyen COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-01-26 MICR

3、OCIRCUIT, DIGITAL, ADVANCED BIPOLAR CMOS, 18-BIT BUS-INTERFACE FLIP-FLOP WITH THREE-STATE OUTPUTS, TTL COMPATIBLE INPUTS, MONOLITHIC SILICON AMSC N/A REVISION LEVEL A SIZE A CAGE CODE 67268 5962-95842 SHEET 1 OF 18 DSCC FORM 2233 APR 97 5962-E425-07 Provided by IHSNot for ResaleNo reproduction or ne

4、tworking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95842 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high rel

5、iability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The P

6、IN is as shown in the following example: 5962 - 95842 01 Q X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA mark

7、ed devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device

8、 type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ABT16823 18 bit bus-interface flip-flop with three- state outputs, TTL compatible inputs 1.2.3 Device class designator. The device class designator is a single letter identifying t

9、he product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.

10、2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDFP1-F56 56 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix

11、A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95842 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings

12、. 1/ 2/ 3/ Supply voltage range (VCC) .-0.5 V dc to +7.0 V dc DC input voltage range (VIN) .-0.5 V dc to + 7.0 V dc 4/ DC output voltage range (VOUT) -0.5 V dc to + 5.5 V dc 4/ DC input clamp current (IIK) (VIN 0.0 V) -18 mA DC output clamp current (IOK) (VOUT 0.0 V) -50 mA DC output current (IOL) (

13、per output) +96 mA VCCcurrent (IVCC).+577 mA Ground current (IGND) 1232 mA Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) 915 mW 5/ Lead temperature (soldering, 10 seconds) .+300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) .+17

14、5C 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VCC) .+4.5 V dc to +5.5 V dc Input voltage range (VIN) .+0.0 V dc to VCCOutput voltage range (VOUT) .+0.0 V dc to VCCMaximum low level input voltage (VIL) 0.8 V Minimum high level input voltage (VIH) .2.0 V Case operating temperatu

15、re range (TC) .-55C to +125C Maximum input rise or fall rate (t/V) .10 ns/V Maximum high level output current (IOH) .-24 mA Maximum low level output current (IOL) .48 mA 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbo

16、oks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF

17、DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents a

18、re available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extende

19、d operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise noted, all voltages are referenced to GND. 3/ The limits for the parameters specified herein shall apply over the full specified VCCrange and case temperature range of -55C to +125C. 4/ The input an

20、d output negative voltage ratings may be exceeded provided that the input and output clamp current ratings are observed. 5/ Power dissipation values are derived using the formula PD= VCCICC+ nVOLIOL, where VCCand IOLare as specified in 1.4 above, ICCand VOLare as specified in table I herein, and n r

21、epresents the total number of outputs. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95842 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 4 DSCC FORM 2234 APR 97 2.2 Order o

22、f precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item

23、requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as describe

24、d herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in

25、 MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. T

26、he truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Ground bounce load circuit and waveforms. The ground bounce load circuit and waveforms shall be as specified on figure 4. 3.2.6 Switching waveforms and test circuit. The

27、switching waveforms and test circuit shall be as specified on figure 5. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and

28、shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2

29、 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall stil

30、l be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in M

31、IL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this d

32、rawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supp

33、ly for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required fo

34、r device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) in

35、volving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentatio

36、n. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 127 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo re

37、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95842 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits 3/ Test and MIL-STD-883 test

38、 method 1/ Symbol Test conditions 2/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified VCCGroup A subgroups Min Max Unit Negative input clamp voltage 3022 VIKFor input under test IIN= -18 mA 4.5 V 1, 2, 3 -1.2 V 4.5 V 1, 2, 3 2.5 V IOH= -3.0 mA 5.5 V 1, 2, 3 3.0 High level output voltage 30

39、06 VOHFor all inputs affecting output under test VIN= 2.0 V or 0.8 V IOH= -24 mA 4.5 V 1, 2, 3 2.0 Low level output voltage 3007 VOLFor all inputs affecting output under test, VIN= 2.0 V or 0.8 V IOL= 48 mA 4.5 V 1, 2, 3 0.55 V Input current high 3010 IIHFor input under test VIN= VCC5.5 V 1, 2, 3 1.

40、0 A Input current low 3009 IILFor input under test VIN= GND 5.5 V 1, 2, 3 -1.0 Three-state output leakage current high 3021 IOZH4/ For control inputs affecting output under test, VIN= 2.0 V or 0.8 V VOUT= 2.7 V 5.5 V 1, 2, 3 10.0 A Three-state output leakage current low 3020 IOZL4/ For control input

41、s affecting output under test, VIN= 2.0 V or 0.8 V VOUT= 0.5 V 5.5 V 1, 2, 3 -10.0 A Three-state output current, power up IOZPU0.0 V to 2.1 V 1, 2, 3 50 Three-state output current, power down IOZPDVOUT= 2.7 V or 0.5 V mOE = dont care 2.1 V to 0.0 V 1, 2, 3 50 A Off-state leakage current IOFFFor inpu

42、t or output under test VINor VOUT= 4.5 V All other pins at 0.0 V 0.0 V 1 100 A High-state leakage current ICEXFor output under test, VOUT= 5.5 V Outputs at high logic state 5.5 V 1, 2, 3 50 A Output current 3011 IO5/ VOUT= 2.5 V 5.5 V 1, 2, 3 -50 -200 mA Outputs high 5.5 V 1, 2, 3 500 A Outputs low

43、5.5 V 1, 2, 3 80 mA Quiescent supply current 3005 ICCFor all inputs VIN= VCCor GND IOUT= 0 A Outputs disabled 5.5 V 1, 2, 3 500 A Quiescent supply current delta, TTL input level ICC6/ For input under test VIN= 3.4 V For all other inputs VIN= VCCor GND 5.5 V 1, 2, 3 1.5 mA See footnotes at end of tab

44、le. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95842 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL A SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristic

45、s - Continued. Limits 3/ Test and MIL-STD-883 test method 1/ Symbol Test conditions 2/ -55C TC +125C +4.5 V VCC +5.5 V unless otherwise specified VCCGroup A subgroups Min Max Unit Input capacitance 3012 CINTC= +25C, VIN= 2.5 V or 0.5 V See 4.4.1c 5.0 V 4 10.5pF Output capacitance 3012 COUTTC= +25C,

46、VOUT= 2.5 V or 0.5 V See 4.4.1c 5.0 V 4 14.5pF Low level ground bounce noise VOLP7/ 5.0 V 4 340mV Low level ground bounce noise VOLV7/ 5.0 V 4 -840mV High level VCCbounce noise VOHP7/ 5.0 V 4 1080mV High level VCCbounce noise VOHV7/ VIH= 3.0 V, VIL= 0.0 V TA= +25C See figure 4 See 4.4.1d 5.0 V 4 -38

47、0mV 4.5 V 7, 8 L H Functional test 3014 8/ VIH= 2.0 V, VIL= 0.8 V Verify output VOSee 4.4.1b 5.5 V 7, 8 L H 5.0 V 9 1.6 5.5 tPLH19/ 4.5 V and 5.5 V 10, 11 1.6 7.7 ns 5.0 V 9 2.1 5.4 Propagation delay time, mCLK to mQn 3003 tPHL19/ CL= 50 pF minimum RL= 500 See figure 5 4.5 V and 5.5 V 10, 11 2.1 6.4

48、 ns 5.0 V 9 1.9 5.3 Propagation delay time, mCLR to mQn 3003 tPHL29/ CL= 50 pF minimum RL= 500 See figure 5 4.5 V and 5.5 V 10, 11 1.9 6.3 ns 5.0 V 9 1.0 4.2 tPZH9/ 4.5 V and 5.5 V 10, 11 1.0 5.1 ns 5.0 V 9 1.5 4.6 Propagation delay time, output enable, mOE to mQn 3003 tPZL9/ CL= 50 pF minimum RL= 500 See figure 5 4.5 V and 5.5 V 10, 11 1.5 5.7 ns See footnotes at end of table Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 59