DLA SMD-5962-95569-1995 MICROCIRCUIT DIGITAL 32-BIT EMBEDDED RISC MICROCPROCESSOR MONOLITIC SILICON《32-BIT植入的精简指令集计算机微型处理器硅单片电路线型微电路》.pdf
《DLA SMD-5962-95569-1995 MICROCIRCUIT DIGITAL 32-BIT EMBEDDED RISC MICROCPROCESSOR MONOLITIC SILICON《32-BIT植入的精简指令集计算机微型处理器硅单片电路线型微电路》.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-95569-1995 MICROCIRCUIT DIGITAL 32-BIT EMBEDDED RISC MICROCPROCESSOR MONOLITIC SILICON《32-BIT植入的精简指令集计算机微型处理器硅单片电路线型微电路》.pdf(29页珍藏版)》请在麦多课文档分享上搜索。
1、LTR DESCRIPT ION DATE (YR-M-DA) PMIC NIA APPROVED STANDARD MICROCIRCUIT DRAWING PREPARED BY Thomas M. Hess CHECKED BY Thomas M. Hess P APPROVED BY Monica L. Poelking DRAWING APPROVAL DATE 95-03-31 REVISION LEVEL THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF D
2、EFENSE DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 MICROCIRCUIT, DIGITAL, 32-BIT EMBEDDED RISC MICROPROCESSOR, MONOLITHIC SILICON SIZE CAGE CODE 5962-95569 A 67268 AMSC N/A SHEET 1 OF 28 I BC FORM 193 JUL 94 DISTRIBUTION STATEMENT A. Approved for pub1 ic release: distribution is unlimited.
3、5962-E156-95 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-W 999999b 0072297 345 _- SMD-5962-95569 , 1. SCOPE STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTW DAYTON, OHIO 45444 1.1 a. This drawing forms a part of a one part - one par
4、t number documentation system (see 6.6 herein). Two product assurance classes consisting of mllitary high reliability (device classes Q and M) and space application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Nuher (PIN
5、). Device class M microcircuits represent non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STD-883, “Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devices“. When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. I SI
6、ZE 5962-95569 A REVISION LEVEL SHEET 2 I 1.2 m. The PIN shall be as shown in the following exanple: 5962 95569 o1 P Y X I I 1 II designator (see 1.2.1) (see 1.2.2) des igna tor (see 1.2.4) (see 1.2.5) - I i I I I I I I I 1 I Lead stock class designator type class outline finish Case Dev i ce Device
7、Federa 1 RHA LA (see 1.2.3) I Drawing number 1.2.1 RHA desisnator. Device class M RHA mrked devices shall meet the MIL-1-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-1-38535 specified RHA l
8、evels and shall be marked with the appropriate RHA designator. A dash (-1 indicates a non-RHA device. 1.2.2 Device tupe(s1. The device type(s) shall identify the circuit function as follows: Dev i ce type Generic number Circuit f unct ion o1 MG8096OMX 32-bi t superscalar microprocessor 1.2.3 Device
9、class desiqnator. The device class designator shall be a single letter identifying the product assurance level as follows: Device class Device reuuiremnts documentation M I Vendor self-certification to the requirements for non-JAN class B microcircuits in accordance with 1.2.1 of MIL-STO-883 - Certi
10、fication and qualification to MIL-1-38535 - Q or V 1.2.4 Case outline(s1. The cae outline(s) shall be as designated in MIL-STD-1835 and as follows: I Outline letter Descriptive desisnator Termi na 1 s Y See figure 1 348 Packacie stvle Ceramic pin grid array Provided by IHSNot for ResaleNo reproducti
11、on or networking permitted without license from IHS-,-,-t SMD-5962-75569 = 9999996 0072298 081 , 1.3 Absolute maximum ratinqs. lJ Storage tenperature range Vc supply voltage with respect to ground range Vottage on any pin with respect to ground range Lead tenperature (soldering, 10 seconds) . Juncti
12、on temperature . Thermal resistance, junction-to-case (OJc): CaseY . Thermal res is tance, junct ion-to-aI ON LEVEL STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 F I I 1 DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted wi
13、thout license from IHS-,-,-SHD-5962-955b7 m 77777b O072300 5bT m I TABLE I. Electrical performance characteristics. l Test STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 I I I I SIZE 5962-95569 A REVISION LEVEL SHEET 5 Unit I -55C S TC S, t125OC I subgroups I type
14、 I I unless otherwise specified I I I Max 0.8 V Low level input voltage I VIH Frequency - 4 MHz I I I I 1,2,3 I All I 2.0 V vcc+o.3 High level input voltage I I I I I I I I I I I 1 I 1,2,3 I All I -0.3 VIL-RST 12/ Input low voltage reset 0.8 V I I I I I I I I I I I I 1,2,3 I All I 2.0 VIH-RST Ifrequ
15、ency = 4 MHz Input high voltage reset Vcc+O. 3 V Input low voltage clock-in I I I VCL 12/ I I I 1 I I I l I 1,2,3 I All I -0.3 0.8 V Input high voltage clock-in ucc V Output low voltage 0.45 V Output low voltage 0.45 V V - Output high voltage Voltage input ref. voltage 1.5 VIREF 10 I i 1,2,3 i All 1
16、 1.1 I I I V Power supply current 1.3 Icc I I i 1,2,3 i All i I I I A I 1 I I I I 1,2,3 1 All 1 I I ILI1 lo VIN vcc 5/ I I I I I 115 Input leakage current I I I I See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-59b2
17、-955b9 = 999999b 0072303 4Tb = TABLE I. Electrical performance characteristics - Continued. I I I I Test Conditions I/ 1 Group A Device i Limits i Unit -55 5 T 5 +1250c i subgroups i type i unless otherwise specified I I I I i 4.75 V S VCC 5 5.25 V I ILI2 VIN = 0.45 V s/ i 1.2.3 1 All I I I I t400 I
18、 I Input leakage current Input 1 ea kage current ILI3 IL0 Output leakage current Capacitance on input pins IN Capacf tance on BBUS address and control BA Func t iona 1 test See 4.4.lb Jperating frequency LJcc = 4.75 v i i tl LJcc = 4.75 v See figure 4 I I I I I I 9,10,11 I All I 50 l I I I I I ns I
19、I Clock period I t See figure 4 I I I I I VIL = 10% point s/ I 9,10,11 I All I 12.5 I I “S I I I I I See figure 4 l I I I I JIH - 90% point 9J I 9.10.11 1 All 1 12.5 1 I ns I I I I I t2 - Clock low time - :lock high time t3 I I I I I See figure 4 I I I I I t4 dIN = 90% to 10% pointg/u/ i 9.10.11 i A
20、I i 1 12.5 i ns I I 1 I I I I I Jcc = 4.75 v I I :lock fall time See figure 4 I I I I I vIN - 90% to 10% pointg/ll/ i 9.i0.11 i AII i i 12.5 j ns ! ! ! ! ! vcc - 4.75 v :lock rise time I I I I I See figure 4 I I I I I Ellys/ 1 9,10,11 I All 1 25 I I ns I l I I I teset set-up t6 See footnotes at end
21、of table. -!- REVISION LEVEL STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 5962-95569 SHEET 6 JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-l I I I I STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPP
22、LY CENTER DAYTON, OHIO 45444 SIZE 5962-95569 A REVISION LEVEL SHEET 7 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-I I I I I Test I sm1 i t20 1 91 6-Bus addr. and control output val id I Lclkout output val id I PFail output vaild STANDARD MICROCIR
23、CUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 I I LError (1:O) output valid I t23 SIZE 5962-95569 A REVISION LEVEL SHEET a I l I t24 Open drain output valid I I I i t26 I I I t27 I I Open drain input Set-up I t25 Open drain input hold Bstopbus input Set-up I 1 %!8 I I t29 I Bstop
24、bus input hold Hisc. signal input Set-up I I I t30 Misc. signal input hold I 1 t31 8-Bus float delay output val id I I I t32 nLBus float delay See footnotes at end of table. Conditions I/ -55C 5 TC S t125“C 4.75 V 5 Vcc S 5.25 V unless otherwise specified 25 - 4.75 “ See figure 4 I = 4.75 v Ql3J jee
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