ASTM F1662-2016 Standard Test Method for Verifying the Specified Dielectric Withstand Voltage and Determining the Dielectric Breakdown Voltage of a Membrane Switch or Printed Elect.pdf

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1、Designation: F1662 10F1662 16Standard Test Method forVerifying the Specified Dielectric Withstand Voltage andDetermining the Dielectric Breakdown Voltage of aMembrane Switch or Printed Electronic Device1This standard is issued under the fixed designation F1662; the number immediately following the d

2、esignation indicates the year oforiginal adoption or, in the case of revision, the year of last revision. A number in parentheses indicates the year of last reapproval. Asuperscript epsilon () indicates an editorial change since the last revision or reapproval.1. Scope1.1 This test method covers the

3、 verification of a specified dielectric withstand voltage or dielectric breakdown voltage of amembrane switch.switch or printed electronic device.2. Referenced Documents2.1 ASTM Standards:2F1680 Test Method for Determining Circuit Resistance of a Membrane SwitchF1663 Test Method for Determining the

4、Capacitance of a Membrane Switch or Printed Electronic Device3. Terminology3.1 Definitions:3.1.1 dielectric withstand voltagea voltage, above rated voltage, applied for a specific time between mutually insulated testpoints or between an insulated test point and ground, which results in no visual cha

5、nge or specified leakage current.3.1.2 dielectric breakdown voltagethe voltage at which a disruptive discharge or excessive leakage current occurs.3.1.3 disruptive dischargeflashover (surface discharge), spark over (air discharge), or breakdown (puncture discharge).3.1.4 leakage currentcurrent betwe

6、en mutually insulated test points when a voltage is applied.3.1.5 membrane switcha momentary switching device in which at least one contact is on, or made of, a flexible substrate.3.1.6 printed electronic deviceelectrically functional device manufactured primarily using additive processes, with or w

7、ithoutattached conventional or other electronic components, often in flexible format.3.1.7 test pointstwo preselected mutually insulated locations on switch assembly.4. Significance and Use4.1 Dielectric withstand voltage testing is useful for design verification, quality control of materials, and w

8、orkmanship.4.2 This test method is used to verify that the membrane switch or printed electronic device can operate safely at its ratedvoltage, and withstand momentary overpotentials due to switching, surges and other similar electrical phenomena.4.3 Specific areas of testing are, but not limited to

9、:4.3.1 Conductor/dielectric/conductor crossing point,4.3.2 Close proximity of conductors, and4.3.3 Any other conductive surface such as shielding or metal backing panel.4.4 Dielectric withstand voltage testing may be destructive and units that have been tested should be considered unreliable forfutu

10、re use.4.5 Testing using ac voltage may be useful for switches intended for control circuits powered by ac voltages.1 This test method is under the jurisdiction ofASTM Committee F01 on Electronics and is the direct responsibility of Subcommittee F01.18 on Membrane SwitchesPrintedElectronics.Current

11、edition approved May 1, 2010May 1, 2016. Published June 2010May 2016. Originally approved in 1995. Last previous edition approved in 20042010 as F1662- 04.10. DOI: 10.1520/F1662-10.10.1520/F1662-16.2 For referencedASTM standards, visit theASTM website, www.astm.org, or contactASTM Customer Service a

12、t serviceastm.org. For Annual Book of ASTM Standardsvolume information, refer to the standards Document Summary page on the ASTM website.This document is not an ASTM standard and is intended only to provide the user of an ASTM standard an indication of what changes have been made to the previous ver

13、sion. Becauseit may not be technically possible to adequately depict all changes accurately, ASTM recommends that users consult prior editions as appropriate. In all cases only the current versionof the standard as published by ASTM is to be considered the official document.Copyright ASTM Internatio

14、nal, 100 Barr Harbor Drive, PO Box C700, West Conshohocken, PA 19428-2959. United States15. Interferences5.1 The following parameters may affect the results of this test:5.1.1 Humidity,5.1.2 Contamination, and5.1.3 Temperature.6. Apparatus6.1 Electric Device, suitable to provide a controlled dc or a

15、c voltage, leakage current measurement.7. Procedure7.1 Dielectric Withstand Test Method:7.1.1 Measure and record the following characteristics prior to performing test:Membrane Switch:7.1.1.1 Open and closed circuit resistance of the test points in accordance with Test Method Measure and record the

16、followingcharacteristics prior to performing test:F1680.(1) Open and closed circuit resistance of the test points in accordance with Test Method F1680.(2) Capacitance of the test point in accordance with F1663.7.1.1.2 Capacitance of the test point in accordance withConnect two test points on the swi

17、tch assembly, each to a F1663.separatepolarity, on the voltage source.7.1.2 Connect two test points on the switch assembly, each to a separate polarity, on the voltage source.Printed ElectronicDevice:7.1.2.1 Measure and record functional test data based on specification for the device.7.1.3 Select t

18、est voltage from Table 1.7.1.4 Apply the test voltage from zero to specified value as uniformly as possible, at a rate of approximately 12 of the testvoltage per second (V/s), unless otherwise specified. For example, Level 2 in Table 1, the ramp rate is 250 V/s for a test voltageof 500 V dc.7.1.5 Ap

19、ply test voltage to switch assembly for 60 s.7.1.6 Record visual changes or leakage current, or both, if any.7.1.7 Dissipate all charges to ground using appropriate methods prior to continuing test to next test voltage (repeat 7.1.3 to 7.1.7as needed).7.1.8 Repeat measurements recorded in 7.1.1 and

20、7.1.2.7.2 Dielectric Breakdown Method:7.2.1 Connect two test points on the switch assembly, Membrane Switch or Printed Electronic Device, each to a separatepolarity, on the voltage source.7.2.2 Apply the voltage incrementally from zero to breakdown as uniformly as possible, at a rate of 250 V/s unle

21、ss otherwisespecified.7.2.2.1 Apply test voltage to switch assembly for 60 s at each incremental test voltage.7.2.3 Record visual changes and magnitude of breakdown voltage, if any.7.2.4 Dissipate all charges to ground using appropriate methods prior to continuing test to additional test points (rep

22、eat 7.2.1to 7.2.4).8. Report8.1 Report the following information:8.1.1 Temperature,8.1.2 Relative humidity,8.1.3 Specified dielectric withstand voltage (pass or fail),8.1.4 Circuit resistance pre and post (Dielectric Withstand Test), Membrane Switch only,8.1.5 Capacitance pre and post (Dielectric Wi

23、thstand Test), Membrane Switch only,8.1.6 DelectricDielectric breakdown voltage,8.1.7 Actual applied voltage or failure voltage,TABLE 1 Test VoltageATest Voltage Ramp Rate (V/s)Level 1 250 dc 125Level 2 500 dc 250Level 3 1000 dc 500Level 4 As specified (ac or dc) As specifiedAAll dwell times at maxi

24、mum voltage = 60 s.F1662 1628.1.8 Duration of applied voltage,8.1.9 Description of test equipment,8.1.10 Voltage ramp rate,8.1.11 Part number or description of switch, or both,8.1.12 Description of test points,8.1.13 Date of test,8.1.14 Description of visual change (if applicable),9. Precision and B

25、ias9.1 PrecisionIt is not possible to specify the precision of the procedure in Test Method F1662 for measuring the dielectricwithstand because inter-laboratory studies have proven inconclusive due to insufficient participating laboratories with theappropriate equipment.9.2 BiasNo information can be

26、 presented on the bias of the procedure in Test Method F1662 for measuring dielectricwithstand because no standard sample is available for this industry.10. Keywords10.1 dielectric withstand voltage; dielectric breakdown voltage; membrane switchASTM International takes no position respecting the val

27、idity of any patent rights asserted in connection with any item mentionedin this standard. Users of this standard are expressly advised that determination of the validity of any such patent rights, and the riskof infringement of such rights, are entirely their own responsibility.This standard is sub

28、ject to revision at any time by the responsible technical committee and must be reviewed every five years andif not revised, either reapproved or withdrawn.Your comments are invited either for revision of this standard or for additional standardsand should be addressed to ASTM International Headquar

29、ters. Your comments will receive careful consideration at a meeting of theresponsible technical committee, which you may attend. If you feel that your comments have not received a fair hearing you shouldmake your views known to the ASTM Committee on Standards, at the address shown below.This standar

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