DLA SMD-5962-86802 REV F-2012 MICROCIRCUIT LINEAR ANALOG-TO-DIGITAL CONVERTERS WITH THREE-STATE BUFFERED OUTPUTS MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device type 02 (AD571). 87-12-01 R. P. Evans B Make corrections to terminal connections. Make corrections to digital input high current and digital input low current test units. Make corrections to power supply rejection test conditions. Make

2、 corrections to switching waveforms. Add MIL-M-38510 information to 6.2 and 6.6. Make correction to three-state leakage current test units. Editorial changes throughout. 90-06-04 M. A. Frye C Add device type 03. Editorial changes throughout. 97-02-10 R. Monnin D Drawing updated to reflect current re

3、quirements. -rrp 03-02-07 R. Monnin E Modify drawing to current requirements. -rrp 10-10-20 C. Saffle F Under table I, full scale temperature drift test, for device type 02 only; maximum limit column, delete 0.488 and substitute 0.781. Under table I, ICCpower supply current test, both conditions, fo

4、r device types 01 and 02, delete 10 mA and substitute 15 mA. - ro 12-07-31 C. Saffle CURRENT CAGE CODE 67268 THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY Donald R

5、. Osborne DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D.A. Di Cenzo APPROVED BY Nelson Hauck MICROCIRCUIT, LINEAR, ANALOG-TO-D

6、IGITAL CONVERTERS WITH THREE-STATE BUFFERED OUTPUTS, MONOLITHIC SILICON DRAWING APPROVAL DATE 87-04-17 AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 14933 5962-86802 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E193-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license fro

7、m IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86802 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space app

8、lication (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For d

9、evice classes M and Q: 5962 - 86802 01 V A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Case outline (see 1.2.4) Lead finish (see 1.2.5) / / Drawing number For device class V: 5962 - 86802 01 V V A Federal stock class designator RHA designator (see 1.2.1) Device

10、type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA

11、marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 AD570 8-

12、bit A/D with three-state output 02 AD571 10-bit A/D with three-state output 03 AD571 10-bit A/D with three-state output 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as listed below. Since the device class designator has been ad

13、ded after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B mi

14、crocircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86802 DLA LAND AND MARITIME COLUMBUS, OHIO 4321

15、8-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style V GDIP1-T18 or CDIP2-T18 18 Dual-in-line 1.2.5 Lead finish. The lead finish is as specified

16、 in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ Negative supply voltage (VEE) to digital common -16.5 V dc Positive supply voltage (VCC) to digital common . +7 V dc Analog input voltage to analog common 15 V dc Digital in

17、put voltage to digital common 0 V dc to VCCDigital output voltage to digital common 0 V dc to VCCAnalog return to digital common 1 V dc Power dissipation (TA= 25C) . 800 mW Lead temperature (soldering, 10 seconds) +300C Storage temperature range -65C to +150C Junction temperature (TJ) +175C Thermal

18、resistance, junction-to-case (JC) See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) . +88C/W 1.4 Recommended operating conditions. Positive supply voltage range +4.5 V dc to +5.5 V dc Negative supply voltage range -13.5 V dc to -16.0 V dc Minimum high-level input voltage +2.0 V dc Maximu

19、m low-level input voltage . +0.8 V dc Ambient operating temperature range (TA) . -55C to +125C _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for Res

20、aleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86802 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The f

21、ollowing specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturi

22、ng, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microc

23、ircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing

24、and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V

25、shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in

26、accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, app

27、endix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherw

28、ise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in

29、table IIA. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations,

30、the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, a

31、ppendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. Provided by IHSNot for ResaleNo reproduction or netw

32、orking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86802 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a

33、 QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of

34、 compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, ap

35、pendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for devi

36、ce class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DLA Land and Maritime, D

37、LA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device c

38、lass M devices covered by this drawing shall be in microcircuit group number 57 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86802 DLA LAND AND MARITIME COLUMBUS, OHIO 4321

39、8-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ 2/ 3/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Relative accuracy RAUnipolar and bipolar major transitions 3 codes 1, 2, 3

40、 01 0.195 % of FS 1 02, 03 0.195 2, 3, 12 02, 03 0.098 Digital input high voltage VIHBLK and CONV 1, 2, 3 All 2.0 V Digital input low voltage VILBLK and CONV 1, 2, 3 All 0.8 V Digital input high current IIHBLK and CONV , VIH= 5 V 1, 2, 3 All 100 A Digital input low current IILBLK and CONV , VIL= 0 V

41、 1, 2, 3 All 100 A Digital output low voltage VOLDATA READY , bit 1 8, IOL= +3.2 mA 1, 2, 3 01 0.4 V DATA READY , bit 1 10, IOL= +3.2 mA 02, 03 0.4 Digital output high voltage VOHBit 1 8, IOH= -0.5 mA 1, 2, 3 01 2.4 V Bit 1 10, IOH= -0.5 mA 02, 03 2.4 Full scale error 4/ AEUnipolar 1 All 40 mV Bipol

42、ar 20 Full scale temperature drift TCAE2, 3 01, 02 0.781 % of FS 03 0.488 Offset error VOSFirst transition 1 01, 02 20 mV 12 02 10 12 03 20 Offset temperature drift TCVOS2, 3 01 0.391 % of FS 02, 03 0.195 Bipolar zero error BPZELow side MSB, transition bipolar 1 All 20 mV 12 02, 03 10 Bipolar zero t

43、emperature TCBPZEBipolar 2, 3 01 0.391 % of FS 02, 03 0.195 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86802 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL

44、F SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ 2/ 3/ -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Three-state leakage current IOLTVOH= 5 V, VOL= 0 V, bit 1 - 8 1,2,3 01 40 A VOH= 5 V,

45、VOL= 0 V, bit 1 - 10 02,03 40 Power supply current ICCCONV , TA= +25C 1 01,02 15 mA 03 10 BLK, TA= +25C 01,02 15 03 10 IEETA= +25C All -15 Differential nonlinearity 5/ DNL All codes test unipolar and bipolar 1, 2, 3 01 8 Bits 1 02 8 2, 3, 12 02, 03 10 Power supply rejection PSRR -16.0 V VEE -13.5 V,

46、 VCC= +5 V 1 01, 02 78.1 mV 12 02, 03 19.5 +4.5 V VCC +5.5 V, VEE= -15 V 2, 3 All 78.1 Input resistance RIN4, 5, 6 All 3 7 k Conversion time TCSee figure 2, TA= +25C 9 All 15 40 s 1/ VCC= +5 V, VEE= -15 V, VIH= +2.0 V, VIL= +0.8 V, analog input through 15 to pin 13, unipolar configuration. Also, in

47、the unipolar configuration pin 15 (bipolar offset control) is grounded. 2/ For device type 01 one least significant bit (1 LSB) = 0.391% of full scale. 3/ For device types 02 and 03 one least significant bit (1 LSB) = 0.098% of full scale. 4/ For device type 01 full scale error guaranteed trimmable

48、with 200 potentiometer. For device types 02 and 03 full scale error guaranteed trimmable with 50 potentiometer. 5/ Minimum resolution for which no missing codes are guaranteed. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86802 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 Device types 01 02