DLA DSCC-VID-V62 04702 REV A-2011 MICROCIRCUIT DIGITAL HIGH-SPEED CMOS 8-STAGE SYNCHRONOUS DOWN COUNTER MONOLITHIC SILICON.pdf

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1、 REVISIONSLTR DESCRIPTION DATE APPROVEDA Update boilerplate paragraphs to current requirements. - PHN 11-02-01 David J. Corbett CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing RE

2、V PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL, HIGH-SPEED CMOS, 8-S

3、TAGE SYNCHRONOUS DOWN COUNTER, MONOLITHIC SILICON YY-MM-DD 04-04-12 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04702 REV PAGE 1 OF 13 AMSC N/A 5962-V035-11 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTE

4、R, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04702 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance 8-stage synchronous down counter microcircuit, with an operating temperature range of -40C to +125C. 1.2 Vendor Item Drawing

5、 Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/04702 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See

6、 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 CD74HC40103-EP 8-stage synchronous down counter 1.2.2 Case outlines. The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 16 MS-012 Plastic small-outline1.2.3 Lead finis

7、hes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash palladium Z Other 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V to +7 V

8、2/ Input clamp current (IIK) (VIVCC+0.5) 20 mA Output clamp current (IOK) (VOVCC+0.5) 20 mA Source or sink current per output pin (IO) (VO -0.5 or VO VCC+0.5) . 25 mA Continuous current through VCCor GND . 50 mA Package thermal impedance (JA) . 73C/W 3/ Maximum junction temperature (TJ) 150C Lead te

9、mperature (during soldering): At distance 1/16 1/32 inch (1.59 0.79 mm) from case for 10 s max. . 300C Storage temperature range (TSTG) . -65C to +150C _ 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and funct

10、ional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ All voltages are referenced to GND unless otherwise spec

11、ified. 3/ The package thermal impedance is calculated in accordance with JESD 51-7. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04702 REV A PAGE 3 1.4 Recommen

12、ded operating conditions. 4/ 5/ Supply voltage range (VCC) . 2 V to 6 V Minimum high level input voltage (VIH): VCC= 2 V . 1.5 V VCC= 4.5 V 3.15 V VCC= 6 V . 4.2 V Maximum low level input voltage (VIL): VCC= 2 V . 0.5 V VCC= 4.5 V 1.35 V VCC= 6 V . 1.8 V Input voltage range (VI) . 0 V to VCCOutput v

13、oltage range (VO) . 0 V to VCCInput transition (rise and fall) time (tt): VCC= 2 V . 0 to 1000 ns VCC= 4.5 V 0 to 500 ns VCC= 6 V . 0 to 400 ns Operating free-air temperature range (TA) -40C to +125C 2. APPLICABLE DOCUMENTS JEDEC PUB 95 - Registered and Standard Outlines for Semiconductor Devices JE

14、SD 51-7 - High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Applications for copies should be addressed to the Electronic Industries Alliance, 3103 North 10thSt., Suite 240-S, Arlington, VA 22201-2107 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Part

15、s shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part numbe

16、r and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 4/ All unused inputs of the device must be held at VCCor GND to ensure proper

17、device operation. 5/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by IHSNot for ResaleNo reproduction or networ

18、king permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04702 REV A PAGE 4 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case

19、outline. The case outline shall be as shown in 1.2.2 and figure 1. 3.5.2 Function table. The function table shall be as shown in figure 2. 3.5.3 Logic diagram. The logic diagram shall be as shown in figure 3. 3.5.4 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.5 T

20、iming waveforms and test circuit. The timing waveforms and test circuit shall be as shown in figure 5. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04702 REV A

21、PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max High level output voltage VOHCMOS loads VI= VIHor VILIO= -0.02 mA 2 V 25C, -40C to 125C All 1.9 V 4.5 V 4.4 6 V 5.9 TTL loads VI= VIHor VIL, IO= -4 mA 4.5 V 25C 3.98 -4

22、0C to 125C 3.7 TTL loads VI= VIHor VIL, IO= -5.2 mA 6 V 25C 5.48 -40C to 125C 5.2 Low level output voltage VOLCMOS loads VI= VIHor VILIO= -0.02 mA 2 V 25C, -40C to 125C 0.1 V 4.5 V 0.1 6 V 0.1 TTL loads VI= VIHor VIL, IO= -4 mA 4.5 V 25C 0.26 -40C to 125C 0.4 TTL loads VI= VIHor VIL, IO= -5.2 mA 6 V

23、 25C 0.26 -40C to 125C 0.4 Input current IIVI= VCCor GND 6 V 25C 0.1 A -40C to 125C 1 Quiescent supply current ICCVI= VCCor GND IO= 0 mA 6 V 25C 8 A -40C to 125C 160 Input capacitance CINCL= 50 pF 25C 10 pF -40C to 125C 10 Power dissipation capacitance Cpd2/ Input tr, tf= 6 ns 5 V 25C 25 TYP pF Puls

24、e duration twCP See figure 5. 2 V 25C 165 ns -40C to 125C 250 4.5 V 25C 33 -40C to 125C 50 6 V 25C 28 -40C to 125C 43 PL See figure 5. 2 V 25C 125 -40C to 125C 190 4.5 V 25C 25 -40C to 125C 38 6 V 25C 21 -40C to 125C 32 MR See figure 5. 2 V 25C 125 -40C to 125C 190 4.5 V 25C 25 -40C to 125C 38 6 V 2

25、5C 21 -40C to 125C 32 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04702 REV A PAGE 6 TABLE I. Electrical performance characteris

26、tics - Continued. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Maximum frequency fmas3/ CP frequency See figure 5. 2 V 25C All 3 MHz -40C to 125C 2 4.5 V 25C 15 -40C to 125C 10 6 V 25C 18 -40C to 125C 12 Setup time tsuP to CP See figure 5. 2 V 25C 100 ns -40C to 125C 1

27、50 4.5 V 25C 20 -40C to 125C 30 6 V 25C 17 -40C to 125C 26 PE to CP See figure 5. 2 V 25C 75 -40C to 125C 110 4.5 V 25C 15 -40C to 125C 22 6 V 25C 13 -40C to 125C 19 TE to CP See figure 5. 2 V 25C 150 -40C to 125C 225 4.5 V 25C 30 -40C to 125C 45 6 V 25C 26 -40C to 125C 38 To CP, MR inactive See fig

28、ure 5. 2 V 25C 50 -40C to 125C 75 4.5 V 25C 10 -40C to 125C 15 6 V 25C 9 -40C to 125C 13 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO.

29、 V62/04702 REV A PAGE 7 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Hold time thP to CP See figure 5. 2 V 25C All 5 ns -40C to 125C 5 4.5 V 25C 5 -40C to 125C 5 6 V 25C 5 -40C to 125C 5 TE to CP See figure 5

30、. 2 V 25C 0 -40C to 125C 0 4.5 V 25C 0 -40C to 125C 0 6 V 25C 0 -40C to 125C 0 PE to CP See figure 5. 2 V 25C 2 -40C to 125C 2 4.5 V 25C 2 -40C to 125C 2 6 V 25C 2 -40C to 125C 2 Propagation delay time, CP to TC (asynchronous preset) tpdCL= 50 pF See figure 5. 2 V 25C 300 -40C to 125C 450 4.5 V 25C

31、60 -40C to 125C 90 6 V 25C 51 -40C to 125C 77 CL= 15 pF, See figure 5. 5 V 25C 25 TYP Propagation delay time, CP to TC (synchronous preset) CL= 50 pF See figure 5. 2 V 25C 300 -40C to 125C 450 4.5 V 25C 60 -40C to 125C 90 6 V 25C 51 -40C to 125C 77 CL= 15 pF, See figure 5. 5 V 25C 25 TYP Propagation

32、 delay time, TE to TC CL= 50 pF See figure 5. 2 V 25C 200 -40C to 125C 300 4.5 V 25C 40 -40C to 125C 60 6 V 25C 34 -40C to 125C 51 CL= 15 pF, See figure 5. 5 V 25C 17 TYP See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-

33、DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04702 REV A PAGE 8 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Conditions VCCTemperature, TADevice type Limits Unit Min Max Propagation delay time, PL to TC tpdCL= 50 pF See figure

34、5. 2 V 25C All 275 ns -40C to 125C 415 4.5 V 25C 55 -40C to 125C 83 6 V 25C 47 -40C to 125C 71 CL= 15 pF See figure 5. 5 V 25C 23 TYP Propagation delay time, MR to TC CL= 50 pF See figure 5. 2 V 25C 275 -40C to 125C 415 4.5 V 25C 55 -40C to 125C 83 6 V 25C 47 -40C to 125C 71 CL= 15 pF See figure 5.

35、5 V 25C 23 TYP Transition rise and fall time ttCL= 50 pF 2 V 25C 75 ns -40C to 125C 110 4.5 V 25C 15 -40C to 125C 22 6 V 25C 13 -40C to 125C 19 Maximum frequency, CP fmasCL= 15 pF See figure 5. 5 V 25C 25 TYP MHz 1/ Testing and other quality control techniques are used to the extent deemed necessary

36、 to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, product performance is assured by characterization and/or desi

37、gn. 2/ CPDis used to determine the dynamic power consumption per package. PD= (CPDx VCC2x fi) + (CLx VCC2x fo) fi= input frequency fo= output frequency CL= output load capacitance VCC= supply voltage 3/ Noncascaded operation only. With cascaded counters, clock-to-terminal count propagation delays, c

38、ount enables (PE or TE) to clock setup times, and count enables (PE or TE) to clock hold times determine maximum clock frequency. For example, with this device: CP fmax= 1 = 1 11 MHz CP to TC prop delay + TE to CP setup time + TE to CP hold time 60 + 30 + 0 Provided by IHSNot for ResaleNo reproducti

39、on or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04702 REV A PAGE 9 Case X Dimensions Symbol Inches Millimeters Symbol Inches Millimeters Min Max Min Max Min Max Min Max A - .069 - 1.75 E .150 .157 3.81 4.0

40、0 A1 .004 .010 0.10 0.25 E1 .228 .244 5.80 6.20 b .014 .020 0.35 0.51 e .050 TYP 1.27 TYP c .008 NOM 0.20 NOM L .016 .044 0.40 1.12 D .386 .394 9.80 10.00 NOTES: 1. All linear dimensions are in inches (millimeters). 2. This case outline is subject to change without notice. 3. Body dimensions do not

41、include mold flash or protrusion, not to exceed 0.006 inches (0.15 millimeters). 4. Falls within JEDEC MS-012. FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO

42、. 16236 DWG NO. V62/04702 REV A PAGE 10 Function Table 1/ Control Inputs Preset Mode Action MR PL PE TE H H H H Synchronous Inhibit counter H H H L Count down H H L X Preset on next positive clock transition H L X X Asynchronous Preset asynchronously L X X X Clear to maximum count 1/ See figure 5 fo

43、r timing diagram. H = High voltage level L = Low voltage level Clock connected to clock output. X = Immaterial Synchronous operation: Changes occur on negative-to-positive clock transitions. Load inputs: MSB = P7, LSB = P0 FIGURE 2. Function table. FIGURE 3. Logic diagram. Provided by IHSNot for Res

44、aleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04702 REV A PAGE 11 Case outlines: X Terminal number Terminal symbol Terminal number Terminal symbol 1 CP 9 PL (ASYNC) 2 MR 10 P4 3 TE 11 P5

45、4 P0 12 P6 5 P1 13 P7 6 P2 14 TC 7 P3 15 PE (SYNC) 8 GND 16 VCCFIGURE 4. Terminal connections. FIGURE 5. Timing waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDE

46、NT NO. 16236 DWG NO. V62/04702 REV A PAGE 12 Notes: 1. CLincludes probe and jig capacitance. 2. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO= 50, tr 6 ns, tf 6 ns. 3. For clock inputs, f

47、maxis measured when the input duty cycle is 50%. 4. The outputs are measured one at a time with one input transition per measurement. 5. tPLHand tPHLare the same as tpd. FIGURE 5. Timing waveforms and test circuit - Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER