BIO-MEMS DEVICES TO MONITOR NEURAL ELECTRICAL .ppt
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1、BIO-MEMS DEVICES TO MONITOR NEURAL ELECTRICAL CIRCUITRY,Andres Huertas, Michele Panico, Shuming Zhang,ME 381 Final Project, Dec 4th, 2003,Planar monitoring system Neurons cage array Living chips with peptide amphiphiles gels,OUTLINE,Jenker, Mller, Fromherz, Biol. Cybern. 84, 239-249 (2001),Simple Ru
2、gged Easiest solution,“Future hybrid neuron-semiconductor chips will consist of complex neural networks that are directly interfaced to electronic integrated circuits. . . and may lead to novel computational facilities.”,ORIGINAL TECHNIQUE,PACKAGED CHIPS,Very simple design Scale is achievable,MANUFA
3、CTURE,DATA,PROCESSES GROWTH,PROBLEMS,Polyimide Picket Fences.,MANUFACTURE,Gnther Zeck and Peter, Fromherz, PNAS, 2001 vol. 98, no. 18, 10457-10462,Successful at immobilizing neurons Retains Functionality,MANUFACTURE,DATA,NEURO-CAGES FOR LIVE NEURAL NETWORKS STUDY,To study neural networks of individu
4、al neurons is the aim of neuroscience,Conventional technique: planar arrays of extracellular metal electrodes on which neural cultures are grown,Limitations:Small proportion of neurons can be accessedNeurons are mobile, thus repeated measurements ofa specific neuron are difficult,Micro-cages: each n
5、euron is trapped into one cage,Features:Arrays of neuro-cages to allow the formation of neural networksOne-to-one correspondence between neurons and electrodesNeurite growth is not affected by the physical confinement,Qing He., Ellis Meng, Yu-Chong Tai, Christopher M. Jerome Pine, etc, The 12th Inte
6、rnational Conference on Solid-State Sensors, Boston, MA, Jun 8-12, 2003,SILICON MICROMACHINED NEUROCHIPS,Neurochip: 1 cm square, 500 m thick silicon wafer, with a 4x4 array of wells spaced on 100 m centers,MICROFABRICATION PROCESS,Composite layer of 180 nm LPCVD silicon nitride on top of 50 nm therm
7、al oxide is formed Pattern nitride-oxide layer to define the openings for the metal electrodes 1 m oxide step around the electrode openings Nitride is stripped Metallization is done using lift-off process Metallization is covered by a composite insulation Layer of 0.5 m LTO and 1 m PECVD nitride Ope
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