ITU-T V 54-1988 LOOP TEST DEVICES FOR MODEMS《用于调制解调器的回路测试设备-电话网络上的数据交流 第XVII研究组 第17页》.pdf

《ITU-T V 54-1988 LOOP TEST DEVICES FOR MODEMS《用于调制解调器的回路测试设备-电话网络上的数据交流 第XVII研究组 第17页》.pdf》由会员分享，可在线阅读，更多相关《ITU-T V 54-1988 LOOP TEST DEVICES FOR MODEMS《用于调制解调器的回路测试设备-电话网络上的数据交流 第XVII研究组 第17页》.pdf（19页珍藏版）》请在麦多课文档分享上搜索。

1、INTERNATIONAL TELECOMMUNICATION UNION)45G134 6 TELECOMMUNICATIONSTANDARDIZATION SECTOROF ITU$!4!G0G0#/-5.)#!4)/./6%2G0G04(%G0G04%,%0(/.%G0G0.%47/2+,/0G0G04%34G0G0$%6)#%3G0G0 amended at Geneva, 1980,Malaga-Torremolinos, 1984 and at Melbourne, 1988)1 IntroductionThe CCITT,consideringthe increasing use

2、 being made of data transmission systems, the volume of the information circulating on datatransmission networks, the savings to be made by reducing interruption time on such links, the importance of being ableto determine responsibilities in maintenance questions for networks, of necessity involvin

3、g several parties, and theadvantages of standardization in this field,unanimously declares the following:The locating of faults can be facilitated in many cases by looping procedures in modems. These loops allowlocal or remote measurements, analogue or digital, to be carried out optionally by the Ad

4、ministrations and/or usersconcerned.2 ScopeThis Recommendation specifies modem loop testing procedures for the following cases:- for synchronous mode of operation over point-to-point leased circuit, multipoint, tandem and generalswitched telephone network (GSTN) connections;- for start-stop mode of

5、operation over point-to-point leased circuit and GSTN connections.3 Definition of the loopsFour loops are defined (numbered 1 to 4) and their locations as seen from DTE A are shown in Figure 1/V.54. Asymmetrical set of four loops could exist as seen from DTE B.2 Fascicle VIII.1 - Rec. V.543.1 Loop 1

6、This loop is used as a basic test on the operation of the DTE, by returning transmitted signals to the DTE forchecking. The loop should be set up inside the DTE as close as possible to the interface.While the DTE is in the loop 1 test condition:- transmitted data (circuit 103) are connected to recei

7、ved data (circuit 104) within the DTE;- circuit 108/1 or 108/2 must be in the same condition as it was before the test;- circuit 105 must be in the OFF condition;- circuit 125 should continue to be monitored by the DTE so that an incoming call can be given priority overa routine loop test.Interchang

8、e circuit 103 as presented to the DCE must be in the binary 1 condition.The conditions of the other interchange circuits are not specified but they should if possible permit normalworking. The transmitter timing information, in particular if it comes from the DCE, will continue to be sent (seeRecomm

9、endation V.24, 4.6.2).Note - When circuits 108 and 105 are not used by the DTE (for applications on leased lines, for example) theDCE will not be informed of the test condition. This is considered acceptable provided that the remote station is notdisturbed.3.2 Loop 3This is a local loop established

10、in analogue mode as close as possible to the line to check the satisfactoryworking of the DCE. The loop should include the maximum number of circuits used in normal working (in particular thesignal conversion function, if possible) which may in some cases necessitate the inclusion of devices for att

11、enuatingsignals, for example.The establishment of the loop presents no difficulty when using a 4-wire line, except in certain cases in whichparts of the line equalization system are removed from service.For certain 2-wire lines the loop may be obtained by simple unbalance of the hybrid transformer.W

12、hile the DCE is in the loop 3 test condition:- the transmission line is suitably terminated, as required by national regulations;- all interchange circuits are operated normally, except in the case of 2-wire half-duplex operation where themandatory clamping involving circuits 105 and 109 (as specifi

13、ed in Recommendation V.24, 4.3.2 a) isdisabled;- circuit 125 should continue to be monitored by the DTE so that an incoming call can be given priority overa routine loop test, after abandoning the loop 3 condition;- no signal is transmitted to line on the data channel.Since most interchange circuits

14、 operate normally, a diagram of interchange circuit operation sequence is notpresented.Note 1 - In certain switched networks the loop 3 procedure may clear the connection due to national regulations.During the loop 3 condition, however, the DCE must not be switched to the line, if not already connec

15、ted.Note 2 - In 4-wire point-to-point connections circuit 105 may be continuously ON. If in such cases synchronousmodems are used, no test data should be transmitted until circuits 106, 109 and 142 are in the ON condition.3.3 Loop 2Loop 2 is designed to permit station A or the network to check the s

16、atisfactory working of the line (or part of theline) and of the DCE B. It can only be used with a duplex DCE; the application to the backward channel is left forFascicle VIII.1 - Rec. V.54 3further study. Pseudo loop 2 may be defined for a half-duplex DCE and will be specified in the Recommendation

17、relatingto the DCE concerned.The establishment of the loop will be effective when the control is applied, regardless of the condition ofcircuit 108 presented by the DTE associated with the DCE in which the loop is set up.While the DCE B is in the loop 2 test condition:- circuit 104 is connected inte

18、rnally in the DCE to circuit 103 (see Note 1);- circuit 104 to the DTE is maintained in the binary 1 condition;- circuit 109 is connected internally in the DCE to circuit 105 (see Note 1);- circuit 109 to the DTE is maintained in the OFF condition;- circuit 106 to the DTE is maintained in the OFF co

19、ndition;- circuit 107 to the DTE is maintained in the OFF condition;- circuit 115 is connected internally in the DCE to circuit 113 if provided (see Note 1);- circuit 115 and circuit 114, if provided, to the DTE continue to function.Note 1 - For the internal DCE connections, the electrical signal ch

20、aracteristics may either be that of theinterchange circuits or that of the logic level used inside the DCE.Note 2 - In certain applications, it may not be desirable to connect circuit 115 to circuit 113. In these cases aflexible buffer between circuits 104 and 103 might be recommended. Alternatively

21、, changes in the transmit clock may bedone in a phase-continuous manner.3.4 Loop 4This loop arrangement is only considered in the case of 4-wire lines. Loop 4 is designed for the maintenance oflines by Administrations using analogue-type measurements. When receiving and transmitting pairs are connec

22、ted intandem, such a connection cannot be measured as a data circuit (conformity with a line characteristic curve, forexample).In the loop position the two pairs are disconnected from the DCE and are connected to each other through asymmetrical attenuator designed to prevent any oscillation of the c

23、ircuit (the loop, therefore, does not include any of theamplifiers and/or distortion correctors used in the DCE). The value of the attenuator will be fixed by each Administrationin compliance with Recommendation G.122 1.Loop 4 may be established inside the DCE or in a separate unit.When loop 4 is in

24、side the DCE, and while in the test condition, the DCE presents circuits 107 and 109 to theDTE in the OFF condition and circuit 142 is in the ON condition. When loop 4 is in a separate unit, these conditions aredesirable but not mandatory.4 Loop controlTwo (non-exclusive) types of control might be p

25、ossible on the DCE:- manual control by a switch on the equipment;- automatic control through the DCE-DTE interface or upon recognition of a loop initiation signal in thereceived data.The test procedures shall be based on either manual or automatic control of loops. Combined use of thesecontrol metho

26、ds shall be avoided. However, manual release of a test loop shall have priority over automatic control inthose DCEs where both test methods are implemented.Note - The response of a DCE to automatic or manual control attempts in the case where the other controlmethod is used, is not specified.4 Fasci

27、cle VIII.1 - Rec. V.54Interchange circuit 142 shall be used to inform the DTE of a loop condition in the local DCE, even in the caseof manual control (but see Note 3 to Table 1/V.54). To avoid ambiguity in interpretation of circuit 142 only one loopshould be established at any one time in the DCE.4.

28、1 Manual controlSee Table 1/V.54.TABLE 1/V.54Interface signalling for manual control of loopsLoopControl switchon Signal to DTE A Signal to DTE B NotesCircuit 107 Circuit 142 Circuit 107 Circuit 142234DCE BDCE ADCE B*)ON*)*)ON*)OFF*)OFFON*)ONNote 1Note 2Note 3*) Not applicable.Note 1 - Data station

29、A is in the normal operating condition. The loop is established by a switch on DCE B.Note 2 - In DCE A, the condition of circuit 107 will be determined by the condition of circuit 108. When circuit 108 is not provided onthe interface, circuit 107 is ON. The normal case is considered in the table.Not

30、e 3 - When loop 4 is in a unit separate from the DCE, the signals to DTE B are desirable but not mandatory due to the difficulty ofimplementation. When the loop is implemented within the DCE, loop establishment, shall always be possible by a switch on the DCE.Note 4 - The conditions represented by O

31、N in the table may also activate a visual indicator on the DCE.4.2 Automatic control through the DTE/DCE interface (see Table 2/V.54)Automatic control through the interface is achieved by using circuit 140, 141 and 142 as defined inRecommendation V.24. Circuit 140 is used to control loop 2 and circu

32、it 141 is used to control loop 3. The turning ON ofcircuit 142 indicates the test mode is established. If circuit 107 is ON, the associated terminal is concerned andsubsequent data transmitted on circuit 103 will be looped back on circuit 104. If circuit 107 is OFF, the associatedterminal is not con

33、cerned.Note 1 - Automatic control of loop 4 is considered of no use either locally or in the remote station and thereforeis not provided.Note 2 - As an alternative to activation of loop 3 via circuit 141, it could be activated via the four-phaseprocedure defined in 4.2 here.TABLE 2/V.54Interface sig

34、nalling for automatic control of loopsLoop Control signals from DTE A Signals to DTE A Signals to DTE B NotesCircuit 140 Circuit 141 Circuit 107 Circuit 142 Circuit 107 Circuit 1422 ON OFF ON ON OFF ON Notes 1 and 23 OFF ON ON ON *) *) Note 2*) Not applicable.Note 1 - There is a risk of head-on coll

35、ision of controls from the two ends.Note 2 - In DCE A, the condition of circuit 107 will be determined by the condition of circuit 108. When circuit 108 is not provided onthe interface, circuit 107 is ON. The normal case is considered in the table.Fascicle VIII.1 - Rec. V.54 5Normally circuit 103 ca

36、n only be used to transmit data or the test sequence, so long as the conditions of circuits106, 140, 141 and 142 are as indicated in Table 3/V.54.TABLE 3/V.54Circuit 103 Circuit 106 Circuit 140 Circuit 141 Circuit 142DataLoop 2 test sequenceLoop 3 test sequenceONONONOFFONOFFOFFOFFONOFFOFFONFor inter

37、-DCE signalling a four-phase action/reaction sequence should be used. The state of interchange circuitsprincipally involved during this sequence is shown in Figure 2/V.54.Automatic control with synchronous DCEs is described for:- simple multipoint circuits (see 5);- point-to-point duplex circuits (s

38、ee 6);- tandem circuits (see 7).Automatic control with asynchronous DCEs is described for:- point-to-point duplex circuits (see 8).6 Fascicle VIII.1 - Rec. V.54Fascicle VIII.1 - Rec. V.54 7Explanation of Figure 2/V.54Central site(a) Circuit 140 goes ON (to DCE), requesting a maintenance sequence.(b)

39、 Circuit 106 goes OFF (from DCE), very shortly thereafter, if not already OFF.(c) Circuit 106 goes ON (from DCE), after a delay, which signifies that the DCE can accept address information.(d) Circuit 103 is active (to DCE), transmitting the address.(e) Circuit 142 goes ON (from DCE), after a delay,

40、 signifying that the maintenance address has been acted upon and ifa loop establishment has been requested, circuit 103 may now be used for the test message.(f) Circuit 103 is active (to DCE), containing a test message or any other data as required by the maintenance routinebeing performed.(g) Circu

41、it 140 goes OFF (to DCE), requesting termination of the maintenance sequence and a return to normaloperation.(h) Circuit 106 goes OFF (from DCE), very shortly thereafter.(i) Circuit 142 goes OFF (from DCE), after a delay, signifying that the terminating phase is complete and the system isreturned to

42、 normal operation.(j) Circuit 106 may be ON or OFF after the maintenance sequence.During the maintenance the state of circuit 105 would be disregarded.Remote site(k) Circuit 142 goes ON (from DCE), indicating test mode to the remote DTE.Circuit 107 goes OFF. Circuits 106 and 109 go OFF if not alread

43、y OFF.Circuit 104 is clamped to binary 1 condition. Before preparatory recognition spurious bits may appear oncircuit 104.(l) Circuit 142 is turned OFF, circuit 107 is turned ON, the clamping of circuit 104 by circuit 142 ON condition isremoved, signifying that termination recognition has taken plac

44、e at the remote DCE, and that it has returned to thenormal mode.(m) Circuits 106 and 109 may be ON or OFF, prior to and after the maintenance sequence.5 Inter-DCE signalling for simple multipoint circuits with synchronous DCEsNote 1 - Modems in accordance with Recommendation V.22 are excluded from t

45、his procedure.Note 2 - Considering the fact that there already exist or will exist modems implementing other signallingtechniques than the one defined in this Recommendation and that these signalling techniques have been designedaccording to special conditions formulated by Administrations or users,

46、 this Recommendation does not limit the use ofsuch signalling techniques.A state diagram of the preparatory, address, test and termination phase is shown in Figure A-2/V.54.5.1 Preparatory phaseDuring the preparatory phase DCE A will transmit a pattern of 2048 100 bits produced by scrambling abinary

47、 0 with the polynominal 1 + x-4+ x-7. No particular starting pattern is specified. Transmission will be at thenormal DCE data signalling rate. The pattern will be transmitted as though it were introduced to the DCE via circuit 103.Figure 3/V.54 shows an example of a suitable implementation of the sc

48、rambler. Before transmitting the preparatorypattern, DCE A has to establish a data channel, if not already available.8 Fascicle VIII.1 - Rec. V.54The criteria for the recognition of this pattern by DCE B are not part of this Recommendation. The criteria thatare implemented should offer a very high p

49、rotection against false recognition due to simulation by user data and someprotection against failure to recognize the preparatory pattern due to a high bit error rate. In order to provide protectionagainst false recognition caused by user HDLC frames, the bit sequence consisting of seven consecutive binary 1s, whichis at present in the preparatory pattern, must be included in the recognition criteria.DCE B will start Timer T1 (if implemented) upon recognition of the preparatory phase.5.2 Address phase5.2.1 Address signallingDuring the address phase the DTE will transmit