DLA SMD-5962-96873 REV B-2013 MICROCIRCUIT MEMORY DIGITAL CMOS RADIATION-HARDENED 8K X 8-BIT PROM MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Boilerplate update and part of five year review. tcr 06-02-13 Raymond Monnin B Update drawing to reflect current MIL-PRF-38535 requirements. Removed class M references. glg 13-11-25 Charles Saffle REV SHEET REV B SHEET 15 REV STATUS REV B B B B B
2、 B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary L. Gross DLA LAND AND MARITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL APPROVED BY Raymond
3、Monnin MICROCIRCUIT, MEMORY, DIGITAL, CMOS, RADIATION- HARDENED, 8K x 8-BIT PROM, MONOLITHIC SILICON DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-10-02 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-96873 SHEET 1 OF 15 DSCC FORM 2233 APR 97 5962-E063-14 .Prov
4、ided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96873 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assuranc
5、e class levels consisting of high reliability (device class Q) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflec
6、ted in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 R 96873 01 Q Y C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator.
7、 Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type 1/ Generic number 2/ Circui
8、t function Access time 01 28F64 8K X 8-bit Radiation hardened PROM 35 ns 02 28F64 8K X 8-bit Radiation hardened PROM 45 ns 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation
9、Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CDIP2-T28 28 Dual-in-line package Y CDFP3-F28 28 Flat pack 1.2.5 Lead finish. The lead
10、finish is as specified in MIL-PRF-38535 for device classes Q and V. 1.3 Absolute maximum ratings. 3/ Supply voltage range . -0.3 V dc to +7.0 V dc Voltage on any pin with respect to ground . -0.5 V dc to VDD+0.5 V dc Maximum power dissipation (PD) . 1.5 W Lead temperature (soldering, 10 seconds maxi
11、mum) +260C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ). +175C Storage temperature range -65C to +150C Temperature under bias . -55C to +125C _ 1/ Device is available in an unprogrammed state only. 2/ Generic numbers are listed on the Standard Microcircuit Dra
12、wing Source Approval Bulletin at the end of this document and will also be listed in QML-38535 and MIL-HDBK-103 (see 6.6.1 herein). 3/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reli
13、ability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96873 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. Supply volta
14、ge (VDD) +4.5 V dc to +5.5 V dc Ground voltage (GND) . 0.0 V dc Input high voltage (VIH). +2.4 V dc minimum to VCCInput Low voltage (VIL) . 0.0 V dc to +0.8 V dc maximum Case operating temperature range (TC) . -55C to +125C Radiation features: Total dose irradiation (Dose Rate = 50 to 300 Rads (Si)/
15、S) . 1.0 MRads(Si) Single event phenomenon (SEP) effective linear energy threshold (LET) with no upsets . 128 MEV-cm2/mg Neutron irradiation 1 x 1014neutrons/cm24/ 1.5 Digital logic testing for device classes Q and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883, method 5012)
16、 100 percent 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation
17、 or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFEN
18、SE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-50
19、94.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Stand
20、ard F1192 - Standard Guide for the Measurement of Single Event Phenomena (SEP) Induced by Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; ht
21、tp:/www.astm.org.) JEDEC INTERNATIONAL (JEDEC) JESD 78 - IC Latch-Up Test. (Applications for copies should be addressed to JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S, Arlington, VA 22201-2107; http:/www.jedec.org.) (Non-Government standards and other publications ar
22、e normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein,
23、the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 4/ Guaranteed, but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-S
24、TANDARD MICROCIRCUIT DRAWING SIZE A 5962-96873 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified
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