DLA SMD-5962-96696 REV D-2005 MICROCIRCUIT LINEAR RADIATION HARDENED CMOS FLASH 8-BIT A D CONVERTER MONOLITHIC SILICON《抗辐射互补金属氧化物半导体 8-BIT交流电和直流电转换器硅单片电路数字微电路》.pdf

《DLA SMD-5962-96696 REV D-2005 MICROCIRCUIT LINEAR RADIATION HARDENED CMOS FLASH 8-BIT A D CONVERTER MONOLITHIC SILICON《抗辐射互补金属氧化物半导体 8-BIT交流电和直流电转换器硅单片电路数字微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-96696 REV D-2005 MICROCIRCUIT LINEAR RADIATION HARDENED CMOS FLASH 8-BIT A D CONVERTER MONOLITHIC SILICON《抗辐射互补金属氧化物半导体 8-BIT交流电和直流电转换器硅单片电路数字微电路》.pdf（22页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R269-97. 97-04-09 R. MONNIN B Update boilerplate to reflect current requirements. rrp 01-06-14 R. MONNIN C Add 3.1.1 and APPENDIX A. - ro 04-07-28 R. MONNIN D Make correction to die Appendix A figure A-1. - ro

2、05-03-18 R. MONNIN REV SHET REV D D D D D D D SHEET 15 16 17 18 19 20 21 REV STATUS REV D D D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Sandra Rooney DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Sandra Rooney COLUMBUS, OHIO

3、 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-01-10 MICROCIRCUIT, LINEAR, RADIATION HARDENED. CMOS FLASH 8-BIT A/D CONVERTER, MONOLITHIC SILICON AMSC N/A REVISION

4、LEVEL D SIZE A CAGE CODE 67268 5962-96696 SHEET 1 OF 21 DSCC FORM 2233 APR 97 5962-E233-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISI

5、ON LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Pa

6、rt or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 96696 01 V Y C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class d

7、esignatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-

8、38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 HS9008RH Radiation hardened CMOS flash 8

9、-bit A/D converter 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microci

10、rcuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CDIP2-T28 28 Dual-in-line Y CDFP3-F

11、28 28 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-

12、96696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ DC supply voltage range, VDDD= VDDA(Referenced to VSSD= VSSA= GND) -0.3 V dc to +7.0 V dc Input voltage range: CE1, CE2, CLK, VREF-, VREF+, VIN, 1/2R VSS 0.3

13、 V dc to VDD+ 0.3 V dc Output voltage range: B1 B8, OF (Outputs off) . VSS 0.3 V dc to VDD+ 0.3 V dc DC input current CE1, CE2, CLK, VIN, B1 B8, OF 10 mA Storage temperature range -65C to +150C Maximum package power dissipation at TA= +125C (PD): 2/ Case outline X 1.02 W Case outline Y 0.77 W Therma

14、l resistance, junction-to-case (JC): Case outline X 9C/W Case outline Y 10C/W Thermal resistance, junction-to-ambient (JA): Case outline X 49C/W Case outline Y 65C/W Lead temperature (soldering, 10 seconds) +300C Junction temperature (TJ) +175C 1.4 Recommended operating conditions. Operating voltage

15、 range (VDDD= VDDA) +4.5 V dc to +5.5 V dc Digital input low voltage (VIL) . 0 V to 0.2 VDDInput high voltage (VIH) . 0.8 VDDto VDDAmbient operating temperature range (TA) . -55C to +125C 1.5 Radiation features Maximum total dose available (dose rate = 50 300 rad/s) . 300 Krad (Si) Dose rate upset (

16、20 ns pulse) 3/ . 5 x 108Rad (Si)/s SEP effective let no upset 3/ 100 MeV/(cm2/mg) Neutron irradiation 3/ 1 x 1014neutrons/cm2Dose rate survivability 3/ 5 x 1011Rad (Si)/s _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum leve

17、ls may degrade performance and affect reliability. 2/ If device power exceeds package dissipation capability, provide heat sinking or derate linearly (the derating is based on JA) at the following rates: Case outline X 20.4 mW/C Case outline Y 15.4 mW/C 3/ Guaranteed by process or design, not tested

18、. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specifica

19、tion, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-385

20、35 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Dra

21、wings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of pr

22、ecedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requ

23、irements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described he

24、rein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.1.1 Microcircuit die. For the requirements of microcircuit die, see appendix A to this document. 3.2 Design, construction, and

25、physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.4 herein. 3.2.2 Termi

26、nal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Timing diagrams. The timing diagrams shall be as specified on figure 3. 3.2.5 Radiation exposure circuit. The radiation exposure circuit informatio

27、n shall be as specified in table III. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient

28、operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical tests for each subgroup are defined in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-

29、,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages whe

30、re marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-

31、PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required

32、in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall

33、 be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for devic

34、e classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535

35、, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects

36、 this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the r

37、eviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 81 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR

38、CUIT DRAWING SIZE A 5962-96696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min MaxInt

39、egral linearity error ILE 1 Differential linearity error DLE VDDD= VDDA= 5.0 V, CLK = 500 kHz, VSSD= VSSA= 0 V, VREF= 4.000 V (Adj.), 1/ 1,2,3 01 0.5 LSB Offset error VOSVDDD= VDDA= 5 V, VSSD= VSSA= 0 V, VREF= 4.000 V (Adj.), VIN= (VREF-) + 0.5 LSB, CLK = 500 kHz 1/ 1,2,3 01 2.0 LSB Gain error GE VD

40、DD= VDDA= 5 V, VSSD= VSSA= 0 V, VREF= 4.000 V (Adj.), VIN= (VREF+) - 1.5 LSB, CLK = 500 kHz 1/ 1,2,3 01 3.0 LSB 1,3 300 600 Ladder impedance REF 2 01 400 900 Full scale range 2/ (VINand (VREF+) (VREF-) FSR VDDD= VDDA= 5 V, VSSD= VSSA= 0 V, VREF= 4.000 V (Adj.) 1,2,3 01 5 V Supply current (IDDD+ IDDA

41、): Dynamic IDDDVDDD= VDDA= 5.5 V, VSSD= VSSA= 0 V, VREF= 4.000 V (Adj.), CLK = 10 MHz 1,2,3 01 135 mA Supply current (IDDD+ IDDA): Static IDDSVDDD= VDDA= 5.5 V, VSSD= VSSA= 0 V, VREF= 4.000 V (Adj.), VIN= VDDor GND 1,2,3 01 80 mA Low level current IILVDDD= VDDA= 5.5 V, VIN= 0 V 1,2,3 01 1.0 A High l

42、evel current IIHVDDD= VDDA= 5.5 V, VIN= 5.5 V 1,2,3 01 1.0 A See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVIS

43、ION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Low level voltage VOLVDDD= VDDA= 4.5 V, IOL= 2 mA 1,2,3 01 0.4 V High level voltage V

44、OHVDDD= VDDA= 4.5 V, IOH= -2 mA 1,2,3 01 2.4 V Three-state low current IOZLIOZHVDDD= VDDA= 5.5 V, VOUT= 0 V, 5.5 V 1,2,3 01 10.0 A Conversion speed CS VDDD= VDDA= 5 V, 2/ CLK = 10 MHz, VSSD= VSSA= 0 V, VREF= 4.000 V (Adj.), CLK = 50% duty cycle, square wave 9,10,11 01 20 MSPS Analog bandwidth BW VDD

45、D= VDDA= 5 V, 3/ CLK = 10 MHz, VSSD= VSSA= 0 V, VREF= 4.000 V (Adj.), VIN= Full scale sine wave 9,10,11 01 10 MHz Differential gain error DGE VDDD= VDDA= 5 V, 1/ 4/ CLK = 10 MHz, VSSD= VSSA= 0 V, VREF= 4.000 V (Adj.) 9,10,11 01 3.5 % Differential phase error DPE VDDD= VDDA= 5 V, 1/ 4/ CLK = 10 MHz,

46、VSSD= VSSA= 0 V, VREF= 4.000 V (Adj.) 9,10,11 01 3.0 Deg. CLK = 1 MHz -48 CLK = 10 MHz -48 Total harmonic distortion 5/ THD VDDD= VDDA= 5 V, VSSD= VSSA= 0 V, VREF= 4.000 V (Adj) CLK = 20 MHz 9,10,11 01 -42 dB CLK = 1 MHz 47 CLK = 10 MHz 46 Signal-to-noise ratio (plus distortion) 5/ SNRD VDDD= VDDA=

47、5 V, VSSD= VSSA= 0 V, VREF= 4.000 V (Adj) CLK = 20 MHz 9,10,11 01 42 dB Integral linearity error ILE CLK = 10 MHz 9,10,11 01 1.0 LSB See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5

48、962-96696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Differential linearity error DLE CLK = 10 MHz 9,10,11 01 0.75 LSB Data output delay TODVDDD= VDDA= 5 V, VSSD= VSSA= 0 V, CLK = 1 MHz, VREF= 4.000 V (Adj.) 9,10,11 01 32 ns Output enable time TENVDDD= VDDA= 5 V, VSSD= VSSA= 0 V, CLK = 1