DLA SMD-5962-96691 REV E-2011 MICROCIRCUIT MEMORY DIGITAL CMOS SRAM 128K x 8-BIT MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Added device type11. Change limits for ICCand ICCDR1in table I. 98-06-22 K. A. Cottongim B Add: note to paragraph 1.2.2 and table I, conditions. Add device types 12 through 17. Add vendor CAGE code 0EU86. Add condition D to paragraphs 4.2.a.1 and
2、 4.3.3.b.1. Changes to table I and dimensions to case outlines T, U, X, Y, and Z. Table I, add note 3 to CINand COUT. 01-03-01 Raymond Monnin C Add case outline N. 01-03-21 Raymond Monnin D Updated drawing to latest requirements. -sld 06-03-07 Raymond Monnin E Updated drawing paragraphs. -sld 11-07-
3、18 Charles F. Saffle REV SHEET REV E E E E E E E E E E E SHEET 15 16 17 18 19 20 21 22 23 24 25 REV STATUS REV E E E E E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Gary Zahn DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil
4、 STANDARD MICROCIRCUIT DRAWING CHECKED BY Michael C. Jones THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Kendall A. Cottongim MICROCIRCUIT, MEMORY, DIGITAL, CMOS, SRAM, 128K x 8-BIT, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-10-30 AMSC N
5、/A REVISION LEVEL E SIZE A CAGE CODE 67268 5962-96691 SHEET 1 OF 25 DSCC FORM 2233 APR 97 5962-E371-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96691 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REV
6、ISION LEVEL E SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents five product assurance classes as defined in paragraph 1.2.3 and MIL-PRF-38534. A choice of case outlines and lead finishes which are available and are reflected in the Part or Identifying Number (PIN). When avail
7、able, a choice of radiation hardness assurance levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 - 96691 01 H X X Federal RHA Device Device Case Lead stock class designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1
8、.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. Device classes H and K RHA marked devices shall meet the MIL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Devi
9、ce type(s). The device type(s) shall identify the circuit function as follows: Device type 1/ 2/ Generic number Circuit function Access time 01 WMS128K8-120 SRAM, 128K X 8-bit 120 ns 02 WMS128K8-100 SRAM, 128K X 8-bit 100 ns 03 WMS128K8-85 SRAM, 128K X 8-bit 85 ns 04 WMS128K8-70 SRAM, 128K X 8-bit 7
10、0 ns 05 MT5C128K8-55, WMS128K8-55 SRAM, 128K X 8-bit 55 ns 06 MT5C128K8-45, WMS128K8-45 SRAM, 128K X 8-bit 45 ns 07 MT5C128K8-35, WMS128K8-35 SRAM, 128K X 8-bit 35 ns 08 MT5C128K8-25, WMS128K8-25 SRAM, 128K X 8-bit 25 ns 09 MT5C128K8-20, WMS128K8-20 SRAM, 128K X 8-bit 20 ns 10 MT5C128K8-17, WMS128K8
11、-17 SRAM, 128K X 8-bit 17 ns 11 WMS128K8-15 SRAM, 128K X 8-bit 15 ns 12 MT5C128K8-55L SRAM, 128K X 8-bit 55 ns 13 MT5C128K8-45L SRAM, 128K X 8-bit 45 ns 14 MT5C128K8-35L SRAM, 128K X 8-bit 35 ns 15 MT5C128K8-25L SRAM, 128K X 8-bit 25 ns 16 MT5C128K8-20L SRAM, 128K X 8-bit 20 ns 17 MT5C128K8-17L SRAM
12、, 128K X 8-bit 17 ns 1/ Due to the nature of the 4 transistor design of the die used in these device types, topologically pure testing is important, particularly for high reliability applications. The device manufacturer should be consulted concerning their testing methods and algorithms. 2/ Device
13、types and case outlines may be similar to the device types and case outlines listed on SMD 5962-89598. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96691 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REV
14、ISION LEVEL E SHEET 3 DSCC FORM 2234 APR 97 1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level. All levels are defined by the requirements of MIL-PRF-38534 and require QML Certification as well as qualification (Class H, K, an
15、d E) or QML Listing (Class G and D). The product assurance levels are as follows: Device class Device performance documentation K Highest reliability class available. This level is intended for use in space applications. H Standard military quality class level. This level is intended for use in appl
16、ications where non-space high reliability devices are required. G Reduced testing version of the standard military quality class. This level uses the Class H screening and In-Process Inspections with a possible limited temperature range, manufacturer specified incoming flow, and the manufacturer gua
17、rantees (but may not test) periodic and conformance inspections (Group A, B, C, and D). E Designates devices which are based upon one of the other classes (K, H, or G) with exception(s) taken to the requirements of that class. These exception(s) must be specified in the device acquisition document;
18、therefore the acquisition document should be reviewed to ensure that the exception(s) taken will not adversely affect system performance. D Manufacturer specified quality class. Quality level is defined by the manufacturers internal, QML certified flow. This product may have a limited temperature ra
19、nge. 1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style N See figure 1 32 Co-fired ceramic flat pack, evolutionary pinout, with or without pedestal T See figure 1 32 Co-fired ceramic SOJ, evo
20、lutionary pinout U See figure 1 32 Co-fired ceramic SOJ, revolutionary pinout X See figure 1 36 Co-fired ceramic flat pack, revolutionary pinout, with or without pedestal and with or without non-conductive tie bar Y See figure 1 32 Co-fired ceramic dual-in-line, evolutionary pinout Z See figure 1 36
21、 Co-fired ceramic SOJ, revolutionary pinout 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) . -0.5 V dc to +7.0 V dc Signal voltage range (VG) -0.5 V dc to VCC+0.5 V dc Power dissipation (PD) . 0.88 W maximum Stor
22、age temperature range . -65C to +150C Lead temperature (soldering, 10 seconds) +300C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc to +5.5 V dc Input low voltage range (VIL) . -0.3 V dc to +0.8 V dc Input high voltage range (VIH) +2.2 V dc to VCC+ 0.3 V dc Case operati
23、ng temperature (TC) -55C to +125C 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from
24、 IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96691 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL E SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of
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