DLA SMD-5962-95538-1996 MICROCIRCUIT HYBRID MEMORY FLASH ERASABLE PROGRAMMABLE READ ONLY MEMORY 128K X 8-BIT《128K X 8-BIT可消除可编程反射存储器只读存储器混合微电路》.pdf

《DLA SMD-5962-95538-1996 MICROCIRCUIT HYBRID MEMORY FLASH ERASABLE PROGRAMMABLE READ ONLY MEMORY 128K X 8-BIT《128K X 8-BIT可消除可编程反射存储器只读存储器混合微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-95538-1996 MICROCIRCUIT HYBRID MEMORY FLASH ERASABLE PROGRAMMABLE READ ONLY MEMORY 128K X 8-BIT《128K X 8-BIT可消除可编程反射存储器只读存储器混合微电路》.pdf（22页珍藏版）》请在麦多课文档分享上搜索。

1、REVISIONSLTR DESCRIPTION DATE (YR-MO-DA) APPROVEDREV SHEETREVSHEET 15 16 17 18 19 20 21REV STATUSOF SHEETSREVSHET 123456789101121314PMIC N/APREPARED BY Steve L. Duncan DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 STANDARDMICROCIRCUITDRAWINGTHIS DRAWING IS AVAILABLEFOR USE BY ALLDEPARTMEN

2、TSAND AGENCIES OF THEDEPARTMENT OF DEFENSEAMSC N/A CHECKED BYMichael Jones MICROCIRCUIT, HYBRID, MEMORY, FLASH,ERASABLE/PROGRAMMABLE READ ONLY MEMORY,128K x 8-BITAPPROVED BYKendall A. Cottongim DRAWING APPROVAL DATE96-12-09SIZEACAGE CODE672685962-95538REVISION LEVELSHEET 1 OF 21DESC FORM 193JUL 94 5

3、962-E054-97DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000SIZEA5962-95538REVISION LEV

4、EL SHEET2DESC FORM 193AJUL 941. SCOPE1.1 Scope. This drawing documents five product assurance classes, class D (lowest reliability), class E, (exceptions), class G(lowest high reliability), class H (high reliability), and class K, (highest reliability) and a choice of case outlines and lead finishes

5、 areavailable and are reflected in the Part or Identifying Number (PIN). When available, a choice of radiation hardness assurance levelsare reflected in the PIN.1.2 PIN. The PIN shall be as shown in the following example:5962 - 95538 01 H X X G0DG0D G0DG0D G0DG0DG0DG0D G0DG0D G0DG0DG0D G0D G0D G0D G

6、0D G0D Federal RHA Device Device Case Leadstock class designator type class outline finishdesignator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3)/ Drawing number 1.2.1 Radiation hardness assurance (RHA) designator. Device classes H and K RHA marked devices shall meet theM

7、IL-PRF-38534 specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHAdevice.1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:Device type Generic number Circuit function Access time01 WF128K32-150HQ5A FLASH EPR

8、OM, 128K X 32-bit 150 ns02 WF128K32-120HQ5A FLASH EPROM, 128K X 32-bit 120 ns1.2.3 Device class designator. This device class designator shall be a single letter identifying the product assurance level asfollows:Device class Device performance documentationD, E, G, H, or K Certification and qualific

9、ation to MIL-PRF-385341.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows:Outline letter Descriptive designator Terminals Package styleX See figure 1 66 Hex-in-line, single cavity, with standoffsY See figure 1 68 Ceramic, Quad Flatpack1.2.5 Lead finish. T

10、he lead finish shall be as specified in MIL-PRF-38534. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000SIZEA5962-95538REVISION LEVEL SHEET3DESC FORM 193AJUL 941.3 Abso

11、lute maximum ratings. 1/Supply voltage range (V ) -2.0 V dc to +7.0 V dcCCSignal voltage range (V ) -0.6 V dc to +6.25 V dcGPower dissipation (P ) 1.1 W Max.DStorage temperature range -65G28 C to +150G28 CLead temperature (soldering, 10 seconds) +300G28 CData retention . 10 years minimumEndurance (w

12、rite/erase cycles) . 10,000 cycles minimum1.4 Recommended operating conditions.Supply voltage range (V ) +4.5 V dc to +5.5 V dcCCInput low voltage range (V ) . -0.5 V dc to +0.8 V dcILInput high voltage range (V ) +2.0 V dc to V +0.3 V dcIH CCCase operating temperature (T ) -55G28 C to +125G28 CC2.

13、APPLICABLE DOCUMENTS2.1 Government specification, standards, and handbook. The following specification, standards, and handbook form a part ofthis drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issueof the Department of Defen

14、se Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solitation.SPECIFICATIONDEPARTMENT OF DEFENSEMIL-PRF-38534 - Hybrid Microcircuits, General Specification for.STANDARDSDEPARTMENT OF DEFENSEMIL-STD-883 - Test Methods and Procedures for Microelectronics.MIL-STD-973

15、 - Configuration Management.MIL-STD-1835 - Microcircuit Case Outlines.HANDBOOKDEPARTMENT OF DEFENSEMIL-HDBK-780 - Standard Microcircuit Drawings.(Unless otherwise indicated, copies of the specification, standards, and handbook are available from the StandardizationDocument Order Desk, 700 Robbins Av

16、enue, Building 4D, Philadelphia, PA 19111-5094.)2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text ofthis drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a speci

17、ficexemption has been obtained.1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at themaximum levels may degrade performance and affect reliability.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-

18、,-,-STANDARDMICROCIRCUIT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000SIZEA5962-95538REVISION LEVEL SHEET4DESC FORM 193AJUL 943. REQUIREMENTS3.1 Item requirements. The individual item performance requirements for device classes D, E, G, H, and K shall be inaccordance with MIL-PRF-38

19、534. Compliance with MIL-PRF-38534 may include the performance of all tests herein or asdesignated in the device manufacturers Quality Management (QM) plan or as designated for the applicable device class. Therefore, the tests and inspections herein may not be performed for the applicable device cla

20、ss (see MIL-PRF-38534). Futhermore, the manufacturers may take exceptions or use alternate methods to the tests and inspections herein and not performthem. However, the performance requirements as defined in MIL-PRF-38534 shall be met for the appilcable device class.3.2 Design, construction, and phy

21、sical dimensions. The design, construction, and physical dimensions shall be as specified inMIL-PRF-38534 and herein.3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2

22、.3.2.3 Truth table(s). The truth table(s) shall be as specified on figure 3.3.2.4 Logic diagram(s). The logic diagram(s) shall be as specified on figures 4, 5, 6, and 7.3.2.5 Block diagram(s). The block diagram(s) shall be as specified on figures 8 and 9.3.2.6 Output load circuit. The output load ci

23、rcuit shall be as specified on figure 10.3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are asspecified in table I and shall apply over the full specified operating temperature range.3.4 Electrical test requirements. The elec

24、trical test requirements shall be the subgroups specified in table II. The electrical testsfor each subgroup are defined in table I.3.5 Programming procedure. The programming procedure shall be as specified by the manufacturer and shall be available uponrequest.3.6 Marking of Device(s). Marking of d

25、evice(s) shall be in accordance with MIL-PRF-38534. The device shall be marked withthe PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked as listed in QML-38534.3.7 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacture

26、r of the device describedherein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, foreach device type listed herein. Also, the data should include a summary of all parameters manually tested, and for those which, ifany, are

27、 guaranteed. This data shall be maintained under document revision level control by the manufacturer and be madeavailable to the preparing activity (DSCC-VA) upon request.3.8 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this drawi

28、ng. The certificate of compliance (original copy) submitted to DSCC-VA shall affirm that the manufacturers product meets theperformance requirements of MIL-PRF-38534 and herein.3.9 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each lot o

29、fmicrocircuits delivered to this drawing.3.10 Endurance. A reprogrammability test shall be completed as part of the vendors reliability monitors. This reprogrammabilitytest shall be done for the initial characterization and after any design process changes which may affect the reprogrammability of t

30、hedevice. The methods and procedures may be vendor specific, but shall guarantee the number of program/erase cycles listed insection 1.3 herein over the full military temperature range. The vendors procedure shall be kept under document control and shallbe made available upon request of the acquirin

31、g or preparing activity.3.11 Data retention. A data retention stress test shall be completed as part of the vendors reliability monitors. This test shall bedone for initial characterization and after any design process change which may affect data retention. The methods andprocedures may be vendor s

32、pecific, but shall guarantee the number of years listed in section 1.3 herein over the full militarytemperature range. The vendors procedure shall be kept under document control and shall be made available upon request of theacquiring or preparing activity.Provided by IHSNot for ResaleNo reproductio

33、n or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000SIZEA5962-95538REVISION LEVEL SHEET5DESC FORM 193AJUL 94TABLE I. Electrical performance characteristics. G0DG0D G0D G0DG0D G0DTest G0DSymbol G0D Conditions 1/ 2/

34、G0D Group A G0DDevice G0D Limits G0D UnitG0DG0D -55G28C G06 T G06 +125G28C G0D subgroups G0D type G0D G0DCG0DG0D unless otherwise specified G0D G0DG0DG0DG0DG0DG0D G0DG0DG0D Min G0D Max G0DG0DG0D G0D G0DG0DG0DG0DDC parametersG0DG0D G0D G0DG0DG0DG0DInput leakage current G0D I G0D V = 5.5 Vdc, V = GND

35、G0D 1,2,3 G0D All G0DG0D 10 G0D G29ALI CC ING0DG0D to V G0D G0DG0DG0DG0DCCG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DOutput leakage current G0D I G0D V = 5.5 Vdc, V = GND G0D 1,2,3 G0D All G0DG0D 10 G0D G29ALO CC ING0DG0D to V G0D G0DG0DG0DG0DCCG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DV acti

36、ve current G0D I G0D CS = V , f = 5 MHz G0D 1,2,3 G0D All G0DG0D 200 G0D mACC CC ILG0DG0D V = 5.5 Vdc G0D G0DG0DG0DG0DCC G0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DV standby current G0D I G0D CS = V , f = 5 MHz G0D 1,2,3 G0D All G0DG0D 1.5 G0D mACC SB IHG0DG0D V = 5.5 Vdc G0D G0DG0DG0DG0DCCG0DG0D

37、 G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DInput low level G0D V G0D G0D 1,2,3 G0D All G0DG0D 0.8 G0D VILG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DInput high level G0D V G0DG0D 1,2,3 G0D All G0D 2.0 G0DG0D VIHG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG

38、0DOutput low voltage G0D V G0D V = 4.5 V, I = 2.1 mA G0D 1,2,3 G0D All G0DG0D 0.45 G0D VOL CC OLG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DOutput high voltage G0D V G0D V = 4.5 V, I = -400G29A G0D 1,2,3 G0D All G0D 2.4 G0DG0D VOH CC OHG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0

39、DG0DG0DDynamic characteristicsG0DG0D G0D G0DG0DG0DG0DOE capacitance G0D C G0D V = 0 V, f = 1.0 MHz G0D 4 G0D All G0DG0D 50 G0D pFOE ING0DG0D T = +25G28 C G0D G0DG0DG0DG0DAG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DWE capacitance G0D C G0D V = 0 V, f = 1.0 MHz G0D 4 G0D All G0DG0D 20 G0D pF1-4 WE

40、ING0DG0D T = +25G28 C G0D G0DG0DG0DG0DAG0DG0D Case outline X G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DWE capacitance G0D C G0D V = 0 V, f = 1.0 MHz G0D 4 G0D All G0DG0D 50 G0D pFWE ING0DG0D T = +25G28 C G0D G0DG0DG0DG0DAG0DG0D Case outline Y G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG

41、0DSee footnotes at end of table.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARDMICROCIRCUIT DRAWINGDEFENSE SUPPLY CENTER COLUMBUSCOLUMBUS, OHIO 43216-5000SIZEA5962-95538REVISION LEVEL SHEET6DESC FORM 193AJUL 94TABLE I. Electrical performance

42、 characteristics - continued.G0DG0D G0D G0DG0D G0DTest G0DSymbol G0D Conditions 1/ 2/ G0D Group A G0D Device G0D Limits G0D UnitG0DG0D -55G28C G06 T G06 +125G28C G0D subgroups G0D type G0D G0DCG0DG0D unless otherwise specified G0D G0DG0DG0DG0DG0DG0D G0DG0DG0D Min G0D Max G0DDynamic characteristics -

43、 continuedG0DG0D G0D G0DG0DG0DG0DCS1-4 capacitance G0D C G0D V = 0 Vdc, f = 1.0 MHz G0D 4 G0D All G0DG0D 20 G0D pFCS ING0DG0D T = +25G28 C G0D G0DG0DG0DG0DAG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DData I/O capacitance G0D C G0D V = 0 Vdc, f = 1.0 MHz G0D 4 G0D All G0DG0D 20 G0D pF I/O ING0DG0D

44、T = +25G28 C G0D G0DG0DG0DG0DAG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DA0-16 capacitance G0D C G0D V = 0 Vdc, f = 1.0 MHz G0D 4 G0D All G0DG0D 50 G0D pFAD ING0DG0D T = +25G28 C G0D G0DG0DG0DG0DAG0DG0D G0D G0DG0DG0DG0DFunctional testingG0DG0D G0D G0DG0DG0DG0DFunctional tests G0DG0D See 4.3.1c G0

45、D 7,8A,8B G0D All G0DG0DG0DRead cycle AC timing characteristicsG0DG0D G0D G0DG0DG0DG0DAddress access time G0D t G0D See figure 4 G0D 9,10,11 G0D 01 G0DG0D 150 G0D nsACCG0DG0D G0D G0D 02 G0DG0D 120 G0DG0DG0D G0D G0DG0DG0DG0DChip select access G0D t G0D See figure 4 G0D 9,10,11 G0D 01 G0DG0D 150 G0D n

46、sCEtime 3/ G0DG0D G0D G0D 02 G0DG0D 120 G0DG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DOutput Enable to output G0D t G0D See figure 4 G0D 9,10,11 G0D 01 G0DG0D 70 G0D nsOEvalid 4/ G0DG0D G0D G0D 02 G0DG0D 50 G0DG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DChip Select or OE to G0D t G0D See figure

47、 4 G0D 9,10,11 G0D 01 G0DG0D 50 G0D nsDFoutput high Z 5/,6/ G0DG0D G0D G0D 02 G0DG0D 40 G0DG0DG0D G0D G0DG0DG0DG0DOutput hold from G0DG0D G0D G0DG0DG0DG0Daddress, CS or OE G0D t G0D See figure 4 G0D 9,10,11 G0D All G0D 0 G0DG0D nsOHchange, whichever 6/ G0DG0D G0D G0DG0DG0DG0Dcomes first G0DG0D G0D G

48、0DG0DG0DG0DByte load timing characteristicsG0DG0D G0D G0DG0DG0DG0DAddress, OE set-up G0D t G0D See figure 5 G0D 9,10,11 G0D All G0D 0 G0D G0D nsAStime G0D t G0D G0D G0DG0DG0DG0DOESG0DG0D G0D G0DG0DG0DG0DG0DG0D G0D G0DG0DG0DG0DAddress hold time G0D t G0D See figure 5 G0D 9,10,11 G0D All G0D 50 G0DG0D nsAHG0DG0D G0D G0DG0DG0D