DLA SMD-5962-95537 REV B-2008 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR MONOLITHIC SILICON.pdf

《DLA SMD-5962-95537 REV B-2008 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR MONOLITHIC SILICON.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-95537 REV B-2008 MICROCIRCUIT DIGITAL BIPOLAR ADVANCED SCHOTTKY TTL QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR MONOLITHIC SILICON.pdf（12页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Update to reflect latest changes in format and requirements. Editorial changes throughout. -les 01-07-10 Raymond Monnin B Update drawing to current requirements. Editorial changes throughout. - gap 08-12-12 Robert M. Heber REV SHET REV SHET REV S

2、TATUS REV B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Larry T. Gauder DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas M. Hess COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AP

3、PROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, BIPOLAR, ADVANCED SCHOTTKY TTL, QUADRUPLE D-TYPE AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-12-09 FLIP-FLOPS WITH CLEAR, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-95537 SHEET 1 OF 11 DSCC FORM

4、2233 APR 97 5962-E277-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95537 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This

5、drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiat

6、ion Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 95537 01 Q E X Federal stock class designator RHA designator (see 1.2.1) Devicetype (see 1.2.2)Deviceclass designatorCaseoutline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.

7、3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the approp

8、riate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54AS175 Quadruple D-type flip-flops with clear 1.2.3 Device class designator. The device class designator is

9、a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qual

10、ification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line package F GDFP-F16 or CDFP3-F16 16 Flat package 2 CQCC1-N20 20 Leadless chip

11、carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95537 DE

12、FENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range . -0.5 V dc minimum to +7.0 V dc maximum Input voltage range (VIN) . -1.2 V dc at -18 mA to +7.0 V dc Storage temperature range . -65C to +150C

13、Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) +175C Lead temperature (soldering, 10 seconds) +300C Maximum power dissipation (PD) 2/ . 187 mW 1.4 Recommended operating conditions. Supply voltage range (VCC) . +4.5 V dc minimum to +5.5 V dc maximum Minimum high

14、level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL) . 0.8 V dc Maximum high level output current (IOH) . -2 mA Maximum low level output current (IOL) . 20 mA Clock frequency (fCLOCK) 100 MHz maximum Ambient operating temperature range (TA) . -55C to +125C 2. APPLICABLE DOCUMENTS

15、 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE

16、SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of

17、Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of preced

18、ence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the absolute

19、maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Maximum power dissipation is defined as VCCX ICCand must withstand the added PDdue to output current test; e.g., IO. Provided by IHSNot for ResaleNo re

20、production or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95537 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device c

21、lasses Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class

22、 M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL

23、-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Blo

24、ck diagram. The block diagram shall be as specified on figure 3. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein,

25、 the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electri

26、cal tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has t

27、he option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certi

28、fication/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate o

29、f compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (

30、see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements

31、of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notificatio

32、n of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, an

33、d the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this d

34、rawing shall be in microcircuit group number 10 (see MIL-PRF-38535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95537 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B

35、SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA+125C Group A subgroups Limits Unit unless otherwise specified Min Max High level output voltage VOHVCC= 4.5 V to 5.5 V, VIL= 0.8 V, VIH= 2.0 V, IOH= -2 mA 1, 2, 3 Vcc-2 V Low level output vo

36、ltage VOLVCC= 4.5 V, VIL= 0.8 V, VIH= 2.0 V, IOL= 20 mA 1, 2, 3 0.5 V Input clamp voltage VIKVCC= 4.5 V, IN= -18 mA 1, 2, 3 -1.2 V High level input current IIH1 VCC= 5.5 V, VIN= 2.7 V 1, 2, 3 20 A IIH2 VCC= 5.5 V, VIN= 7.0 V 1, 2, 3 0.1 mA Low level input current IILVCC= 5.5 V, VIN= 0.4 V 1, 2, 3 -0

37、.5 mA Supply current ICCVCC= 5.5 V 1/ 1, 2, 3 34 mA Output current IOVCC= 5.5 V, VOUT= 2.25 V 1, 2, 3 -30 -112 mA Functional tests See 4.4.1b, VCC= 4.5 V, 5.5 V 7, 8 Maximum clock frequency 3/ fMAX9, 10, 11 100 MHz tPLH 9, 10, 11 4 10 ns Propagation delay time, CLR to any Q or Q tPHL 9, 10, 11 4.5 1

38、5 ns tPLH 9, 10, 11 4 8.5 ns Propagation delay time, CLK to any Q or Q tPHL VCC= 4.5 V to 5.5 V, CL= 50 pF , RL= 500 9, 10, 11 4 11 ns CLR low 9, 10, 11 5.5 ns CLK high 9, 10, 11 4 ns Pulse duration 3/ tWCLK low 9, 10, 11 5 ns Data 9, 10, 11 3 ns Setup time before CLK tSU CLR inactive 9, 10, 11 6 ns

39、 Hold time, data after CLK thVCC= 4.5 V to 5.5 V, CL= 50 pF, RL= 500 All 9, 10, 11 1 ns 1/ ICCis measured with D inputs and CLR grounded, and CLK at 4.5 V. 2/ The output conditions have been chosen to produce a current that closely approximates on half of the true short-circuit output current, IOS.

40、3/ Guaranteed, but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95537 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case

41、 outlines E and F 2 Terminal number Terminal symbol 1 CLRNC 2 1Q CLR3 1 Q 1Q 4 1D 1 Q 5 2D 1D 6 2 Q NC 7 2Q 2D 8 GND 2 Q 9 CLK 2Q 10 3Q GND11 3 Q NC 12 3D CLK 13 4D 3Q 14 4 Q 3Q 15 4Q 3D 16 VCCNC 17 4D 18 4 Q 19 4Q 20 VCCNC = No connection FIGURE 1. Terminal connections. Inputs Outputs CLR CLK D Q Q

42、 L X X L H H H H LH L L H H L X Q0 Q 0 FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95537 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM

43、2234 APR 97 FIGURE 3. Block diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95537 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 NOTES: 1. CLi

44、ncludes probe and jig capacitance. 2. Pulse generator characteristics: PRR = 1MHz, tr= 2.0 ns, tf= 2.0 ns, duty cycle = 50 percent. 3. The outputs are measured one at a time with one input transition per measurement FIGURE 4. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo repr

45、oduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95537 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and

46、inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in

47、 accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with me

48、thod 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A or D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with th