DLA SMD-5962-93143 REV C-2005 MICROCIRCUIT DIGITAL 32-BIT MICROPROCESSOR MONOLITHIC SILICON《硅单片 32位微型处理器 数字微型电路》.pdf

《DLA SMD-5962-93143 REV C-2005 MICROCIRCUIT DIGITAL 32-BIT MICROPROCESSOR MONOLITHIC SILICON《硅单片 32位微型处理器 数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-93143 REV C-2005 MICROCIRCUIT DIGITAL 32-BIT MICROPROCESSOR MONOLITHIC SILICON《硅单片 32位微型处理器 数字微型电路》.pdf（35页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R366-97 97-06-25 Monica L. Poelking B Changes in accordance with NOR 5962-R112-98 98-05-22 Monica L. Poelking C Update boilerplate to MIL-PRF-38535 requirements. - CFS 05-10-17 Thomas M. Hess REV SHET REV C C C

2、 C C C C C C C C C C C C C C C C C SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV C C C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED Thomas M. Hess DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Th

3、omas M. Hess COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, 32-BIT AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 96-07-11 MICROPROCESSOR, MONOLITHIC SILICON AMSC N/A REVISIO

4、N LEVEL SIZE A CAGE CODE 67268 5962-93143 C SHEET 1 OF 34 DSCC FORM 2233 APR 97 5962-E434-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93143 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVI

5、SION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the

6、Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 93143 01 M X X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class

7、designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF

8、-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 68040-25 32-bit microprocessor 02 68020

9、-33 32-bit microprocessor 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B

10、microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CMGA10-179 179 Pin grid arra

11、y Y See figure 1 196 Leaded chip carrier with non-conductive tie bar Z See figure 1 196 Ceramic leaded chip carrier, gull-wing lead 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for R

12、esaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93143 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.3 V dc to +

13、7.0 V dc Input voltage range (VIN) -0.8 V dc to +7.0 V dc Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD): Large buffers enabled. 7.7 W Small buffers enabled. 6.3 W Lead temperature (soldering, 10 seconds). +300C Thermal resistance, junction-to-case (JC): Case X +1.0C/W

14、 Case Y +1.0C/W Case Z +1.0C/W 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.75 V dc to +5.25 V dc Logic high input voltage range (VIH) . +2.0 V dc to VCC+ 0.3 V dc Logic low input voltage range (VIL) . GND - 0.3 V dc to 0.8 V dc Minimum high level output voltage (VOH) 2.4 V dc

15、 Maximum low level output voltage (VOL). 0.5 V dc Frequency of operation (fOP): Device 01 25 MHz Device 02 33 MHz Case operating temperature range (TC) . -55C to TJmax Maximum operating junction temperature (TJ) . +125C 2/ Minimum operating case temperature (TC). -55C 2. APPLICABLE DOCUMENTS 2.1 Gov

16、ernment specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFIC

17、ATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard

18、 Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.

19、) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ This device is not tested at TC= +125C. Testing is performed by setting the junction temperature TJ= +125C and allow

20、ing the case and ambient temperatures to rise and fall as necessary so as not to exceed the maximum junction temperature. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93143 DEFENSE SUPPLY CENTER COLUMBUS C

21、OLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation. INSTITUTE OF EL

22、ECTRICAL AND ELECTRONICS ENGINEERS (IEEE) IEEE Standard 1149.1 - IEEE Standard Test Access Port and Boundary Scan Architecture. (Copies of these documents are available from the Institute of Electrical and Electronics Engineers, 445 Hoes Lane, Piscataway, NJ 08854-4150.) 2.3 Order of precedence. In

23、the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The

24、 individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The ind

25、ividual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 an

26、d herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Block diagra

27、m. The block diagram shall be as specified on figure 3. 3.2.4 Switching test circuit and waveforms. The switching test circuit and waveforms shall be as specified on figure 4. 3.2.5 Boundary scan instruction codes. The boundary scan instruction codes shall be as specified on figure 5. 3.3 Electrical

28、 performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requir

29、ements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where mar

30、king of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38

31、535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL

32、-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be re

33、quired from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device clas

34、ses Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93143 DEFENSE SUPPLY

35、CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcir

36、cuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device cl

37、ass M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device c

38、lass M. Device class M devices covered by this drawing shall be in microcircuit group number 105 (see MIL-PRF-38535, appendix A). 3.11 IEEE 1149.1 compliance. All device types shall be compliant to IEEE 1149.1. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from

39、 IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93143 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ 2/ 3/ -55C TC TJmax VCCmin VCC VCCmax unless otherwise specified

40、 Group A subgroups Device type Limits Unit Min Max Input high voltage VIH1,2,3 All 2.0 VCCV Input low voltage VIL1,2,3 All GND 0.8 V Undershoot voltage VU1,2,3 All -0.8 V 100% large buffer 1.47 Supply current ICCVCC= VCCmax 4/ 100% small buffer 1,2,3 All 1.20 A Input leakage current, AVEC, BCLK, BG,

41、 CDIS, IPLn, MDIS, PCLK, RSTI, SCn, TBI, TCI, TCK, TEA IINVIN= 2.4 V/0.5 V VCC= VCCmax 1,2,3 All -20 20 A High impedance (off-state) leakage current, An, BB, CIOUT, Dn, LOCK, LOCKE, R/W, SIZn, TA, TDO, TIP, TLNn, TMn, TS, TTn, UPAn ITSIVIN= 2.4 V/0.5 V VCC= VCCmax 1,2,3 All -20 20 A Signal low input

42、 current, TMS, TDI, TRST IILVIL= 0.8 V VCC= VCCmax 1,2,3 All -1.1 -0.18 mA Signal high input current, TMS, TDI, TRST IIHVIH= 2.0 V VCC= VCCmax 1,2,3 All -0.94 -0.16 mA Large buffers, IOH= 35 mA, VCC= VCCmin 2.4 Output high voltage VOHSmall buffers, IOH= 5.0 mA, VCC= VCCmin 1,2,3 All 2.4 V Large buff

43、ers, IOL= 35 mA, VCC= VCCmin 0.5 Output low voltage VOLSmall buffers, IOL= 5.0 mA, VCC= VCCmin 1,2,3 All 0.5 V Input capacitance CINVIN= 0 V, f = 1.0 MHz, TA= +25 C, see 4.4.1c 4 All 25 pF Functional testing VCC= VCCmin, see 4.4.1b 7,8 All 01 20 25 Frequency of operation fMAXVCC= VCCmin 9,10,11 02 2

44、0 33 MHz See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93143 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. E

45、lectrical performance characteristics - Continued. Test Symbol Conditions 1/ 2/ 3/ -55C TC TJmax VCCmin VCC VCCmax unless otherwise specified Group A subgroups Device type Limits Unit Min Max Clock timing 01 20 25 PCLK cycle time 1 See figure 4. VCC= VCCmin 9,10,11 02 15 25 ns PCLK rise time 5/ 2 9,

46、10,11 01, 02 1.7 ns PCLK fall time 5/ 3 9,10,11 01, 02 1.6 ns 01 47.5 52.5 PCLK duty cycle (measured from 1.5 V to 1.5 V 5/ 4 9,10,11 02 46.67 53.33 % 01 9.5 10.5 PCLK pulse width high (measured from 1.5 V to 1.5 V for 25 MHz) 5/ 4a 9,10,11 02 7 8 ns 01 9.5 10.5 PCLK pulse width low (measured from 1

47、.5 V to 1.5 V for 25 MHz) 5/ 4b 9,10,11 02 7 8 ns 01 40 50 BCLK cycle time 5 9,10,11 02 30 60 ns 01 4.0 BCLK rise and fall time 6, 7 9,10,11 02 3.0 ns BCLK duty cycle (measured from 1.5 V to 1.5 V) 5/ 8 9,10,11 01, 02 40 60 % 01 16 24 BCLK pulse width high (measured from 1.5 V to 1.5 V) 5/ 8a 9,10,1

48、1 02 12 18 ns 01 16 24 BCLK pulse width low (measured from 1.5 V to 1.5 V) 5/ 8b 9,10,11 02 12 18 ns PCLK, BCLK frequency stability 5/ 9 9,10,11 01, 02 1000 ppm 01 9.0 PCLK to BCLK skew 10 9,10,11 02 n/a ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93143 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1