DLA SMD-5962-91612 REV B-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 256K X 4 STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON《硅单块 256K X4静态随机存取存储器 互补金属氧化物半导体 数字主储存器微型电路》.pdf

《DLA SMD-5962-91612 REV B-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 256K X 4 STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON《硅单块 256K X4静态随机存取存储器 互补金属氧化物半导体 数字主储存器微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-91612 REV B-2006 MICROCIRCUIT MEMORY DIGITAL CMOS 256K X 4 STATIC RANDOM ACCESS MEMORY (SRAM) MONOLITHIC SILICON《硅单块 256K X4静态随机存取存储器 互补金属氧化物半导体 数字主储存器微型电路》.pdf（29页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add 20 and 15 ns parts. Add M package. Add vendor 0EU86. Redrawn with changes. 95-11-29 M. A. Frye B Boilerplate update and part of five year review. tcr 06-11-01 Raymond Monnin REV SHEET REV B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22

2、23 24 25 26 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Jeff Bowling DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FO

3、R USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 256K X 4 STATIC RANDOM ACCESS MEMORY (SRAM), MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 95-11-29 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-91612 SHEET 1 OF 26

4、 DSCC FORM 2233 APR 97 5962-E598-06 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91612 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 S

5、cope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choic

6、e of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 91612 01 M X X Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.

7、5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked w

8、ith the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number 1/ Circuit function Data Retention Access time 01 84256LPS45 256K x 4 SRAM Yes 45 ns 02 84256CS45 256K x 4 SRAM No

9、45 ns 03 84256LPS35 256K x 4 SRAM Yes 35 ns 04 84256CS35 256K x 4 SRAM No 35 ns 05 84256LPS25 256K x 4 SRAM Yes 25 ns 06 84256CS25 256K x 4 SRAM No 25 ns 07 84256LPS20 256K x 4 SRAM Yes 20 ns 08 84256CS20 256K x 4 SRAM No 20 ns 09 MT5C1005 256K x 4 SRAM Yes 15 ns 10 MT5C1005 256K x 4 SRAM No 15 ns 1

10、.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance

11、 with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 28 dual-in-line Y See figure 1 28 SOJ pack

12、age Z CDCC1-N28 28 dual leadless chip carrier U CDFP1-F32 32 flat pack T See figure 1 32 rectangular leadless chip carrier M See figure 1 32 SOJ pckage 1/ Generic numbers are also listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will also be listed

13、 in MIL-HDBK-103 and QML-38535 (see 6.6.2 herein). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91612 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97

14、 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range to (VCC) -0.5 V dc to +7.0 V dc DC input voltage range(VIN) -0.5 V dc to VCC+0.5 V dc 3/ DC output

15、 voltage range (VOUT) .-0.5 V dc to VCC+0.5 V dc 3/ Storage temperature range -65C to +150C Maximum power dissipation (PD) .1.0 W Lead temperature (soldering, 10 seconds).+260C Thermal resistance, junction-to-case (JC): Case X .15C/W 4/ Cases Y and T .18C/W 4/ Cases Z and U.See MIL-STD-1835 Output v

16、oltage applied in high Z state-0.5 V dc to VCC+0.5 V dc Maximum power dissipation, (PD) 1.0 W Maximum junction temperature (TJ).+150C 5/ 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Supply voltage range (VSS) 0.0 V dc High level input voltag

17、e range (VIH).2.2 V dc to VCC+ 0.5 V dc Low level input voltage range (VIL)-0.5 V dc to 0.8 V dc Case operating temperature range (TC).-55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of th

18、is drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL

19、-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ All

20、 voltages referenced to VSS(VSS= ground) unless otherwise specified. 3/ Negative undershoots to a minimum of -3.0 V are allowed with a maximum of 20 ns pulse width. 4/ When the thermal resistance for this case is specified in MIL-STD-1835, that value shall supersede the value indicated herein. 5/ Ma

21、ximum junction temperature shall not be exceeded except for allowable short duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962

22、-91612 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http

23、:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless

24、 otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEDEC Standard EIA/JESD 78 - IC Latch-Up Test. (Applications for copies should be addressed to the Electronics Industries Alliance, 2500 Wilson Boulevard

25、, Arlington, VA 22201; http:/www.jedec.org.) AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena Induced by Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addr

26、essed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in o

27、r through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless

28、a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in th

29、e QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The desig

30、n, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1. 3.2.2 Terminal connectio

31、ns. The terminal connections shall be as specified on figure 2. 3.2.3 Truth table. The truth table shall be as specified on figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-91612 DEFENSE SUPPLY CENTE

32、R COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.2.5 Functional tests. Various functional tests used to test this device are contained in the appendix. If the test patterns cannot be implemented due to test equipment limitations, alternate test patterns to accomp

33、lish the same results shall be allowed. For device class M, alternate test patterns shall be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity upon request. For device classes Q and V alternate test patterns shall

34、be under the control of the device manufacturers Technology Review Board (TRB) in accordance with MIL- PRF -38535 and shall be made available to the preparing or acquiring activity upon request. 3.2.6 Die overcoat. Polyimide and silicone coatings are allowable as an overcoat on the die for alpha par

35、ticle protection only. Each coated microcircuit inspection lot (see inspection lot as defined in MIL- PRF -38535) shall be subjected to and pass the internal moisture content test at 5000 ppm (see method 1018 of MIL-STD-883). The frequency of the internal water vapor testing shall not be decreased u

36、nless approved by the preparing activity for class M. The TRB will ascertain the requirements as provided by MIL- PRF -38535 for classes Q and V. Samples may be pulled any time after seal. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified her

37、ein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The elect

38、rical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has

39、 the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Cer

40、tification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate

41、 of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103

42、 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirement

43、s of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notificat

44、ion of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent,

45、and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this

46、 drawing shall be in microcircuit group number 41 (see MIL-PRF-38535, appendix A). 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM)

47、plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PR

48、F-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. Provided by IHSNot for ResaleNo r