DLA SMD-5962-87808 REV B-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS 4-BIT SYNCHRONOUS UP DOWN DECADE COUNTER WITH ASYCHRONOUS RESET MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add test circuit and notes to figure 4, switching waveforms and test circuit. Update boilerplate to MIL-PRF-38535 requirements. LTG 05-07-15 Thomas M. Hess B Update test condition of IOHand IOLvalues for High and Low output voltage to table I. Up

2、date boilerplate paragraphs to current MIL-PRF-38535 requirements. - MAA 11-07-26 Thomas M. Hess THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED. CURRENT CAGE CODE 67268 REV SHET REV SHET REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A P

3、REPARED BY Greg A. Pitz DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil/ STANDARD MICROCIRCUIT DRAWING CHECKED BY D. A. DiCenzo THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, 4-BIT SYNCHRONOUS UP/

4、DOWN DECADE COUNTER WITH ASYCHRONOUS RESET, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 87-04-17 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 14933 5962-87808 SHEET 1 OF 14 DSCC FORM 2233 APR 97 5962-E437-11 Provided by IHSNot for ResaleNo reproduction or network

5、ing permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87808 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B mi

6、crocircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962- 87808 01 E A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) iden

7、tify the circuit function as follows: Device type Generic number Circuit function 01 54HC192 4-bit synchronous up/down decade counter with asynchronous reset 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals P

8、ackage style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+

9、0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc Clamp diode current (IIK, IOK) 20 mA DC output current (per pin) (IOUT) . 25 mA DC VCCor GND current (per pin) . 50 mA Storage temperature range (TSTG) -65C to +150C Maximum power dissipation (PD) . 500 mW 2/ Lead temperature (sold

10、ering, 10 seconds) . +260C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ) . +175C 1.4 Recommended operating conditions. Supply voltage range (VCC) +2.0 V dc to +6.0 V dc Case operating temperature range (TC) . -55C to +125C Input rise or fall time (tr, tf): VC

11、C= 2.0 V . 0 to 1000 ns VCC= 4.5 V . 0 to 500 ns VCC= 6.0 V . 0 to 400 ns 1/ Unless otherwise specified, all voltages are referenced to ground. 2/ For TC= +100C to +125C, derate linearly at 12 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STA

12、NDARD MICROCIRCUIT DRAWING SIZE A 5962-87808 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions Continued. Minimum setup time, DATA to LOAD (tS): TC= +25C: VCC= 2.0 V 110 ns VCC= 4.5 V 22 ns VCC= 6.0 V 19 ns TC= -55C an

13、d +125C: VCC= 2.0 V 165 ns VCC= 4.5 V 33 ns VCC= 6.0 V 28 ns Minimum hold time, DATA to LOAD (tH): TC= +25C: VCC= 2.0 V 5 ns VCC= 4.5 V 5 ns VCC= 6.0 V 5 ns TC= -55C and +125C: VCC= 2.0 V 5 ns VCC= 4.5 V 5 ns VCC= 6.0 V 5 ns Minimum CLEAR/LOAD pulse width (tW): TC= +25C: VCC= 2.0 V 260 ns VCC= 4.5 V

14、 52 ns VCC= 6.0 V 45 ns TC= -55C and +125C: VCC= 2.0 V 390 ns VCC= 4.5 V 78 ns VCC= 6.0 V 68 ns Minimum COUNT UP/DOWN pulse width (tW): TC= +25C: VCC= 2.0 V 125 ns VCC= 4.5 V 25 ns VCC= 6.0 V 21 ns TC= -55C and +125C: VCC= 2.0 V 190 ns VCC= 4.5 V 38 ns VCC= 6.0 V 32 ns Minimum recovery time, CLEAR t

15、o CLOCK (tREC): TC= +25C: VCC= 2.0 V 50 ns VCC= 4.5 V 10 ns VCC= 6.0 V 9 ns TC= -55C and +125C: VCC= 2.0 V 75 ns VCC= 4.5 V 15 ns VCC= 6.0 V 13 ns Maximum frequency, COUNT UP/DOWN (fMAX): TC= +25C: VCC= 2.0 V 3 MHz VCC= 4.5 V 18 MHz VCC= 6.0 V 20 MHz TC= -55C and +125C: VCC= 2.0 V 2 MHz VCC= 4.5 V 1

16、1 MHz VCC= 6.0 V 12 MHz Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87808 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Governm

17、ent specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATIO

18、N MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Mic

19、rocircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In th

20、e event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The i

21、ndividual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been gr

22、anted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to th

23、e requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. 3.2 Design,

24、 construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as s

25、pecified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Switching waveforms and test circuit. The switching waveforms and test circuit shall be as specified on figure 4. 3.3 Electrical

26、 performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-ST

27、ANDARD MICROCIRCUIT DRAWING SIZE A 5962-87808 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are des

28、cribed in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limit

29、ations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML

30、“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate

31、 of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required

32、in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA

33、 Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitt

34、ed without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87808 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC+125C unless otherwise specified Device typ

35、e Group A subgroups Limits Unit Min Max High level output voltage VOHVIN= VIHor VILIOH= -20 A VCC= 2.0 V All 1, 2, 3 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 5.9 VIN= VIHor VILIOH= - 4.0 mA VCC= 4.5 V 3.7 VIN= VIHor VILIOH=- 5.2 mA VCC= 6.0 V 5.2 Low level output voltage VOLVIN= VIHor VILIOL = + 20 A VCC= 2.

36、0 V All 1, 2, 3 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 0.1 VIN= VIHor VILIOL= +4.0 mA VCC= 4.5 V 0.4 VIN= VIHor VILIOL= +5.2 mA VCC= 6.0 V 0.4 High level input voltage 2/ VIHVCC= 2.0 V All 1, 2, 3 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low level input voltage 2/ VILVCC= 2.0 V All 1, 2, 3 0.3 V VCC= 4.5 V 0.9

37、 VCC= 6.0 V 1.2 Quiescent supply current ICCVCC= 6.0 V, VIN= VCCor GND All 1, 2, 3 160 A Input leakage current IINVCC= 6.0 V, VIN= VCCor GND All 1, 2, 3 1.0 A Input capacitance CINVIN= 0.0 V, TC= +25C See 4.3.1c All 4 10 pF Functional tests See 4.3.1d All 7 Propagation delay time, CLEAR to Qn 3/ tPH

38、L1 CL = 50 pF 10% See figure 4 VCC= 2.0 V All 9 265 ns 10, 11 398 VCC= 4.5 V 9 53 10, 11 80 VCC= 6.0 V 9 45 10, 11 68 Propagation delay time, LOAD to Qn 3/ tPHL2, tPLH2 CL= 50 pF 10% See figure 4 VCC= 2.0 V All 9 290 ns 10, 11 435 VCC= 4.5 V 9 58 10, 11 87 VCC= 6.0 V 9 49 10, 11 74 See footnotes at

39、end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87808 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristi

40、cs Continued. Test Symbol Conditions 1/ -55C TC+125C unless otherwise specified Device type Group A subgroups Limits Unit Min Max Propagation delay time, COUNT UP/DOWN to Qn 3/ tPHL3, tPLH3 CL= 50 pF 10% See figure 4 VCC= 2.0 V All 9 275 ns 10, 11 413 VCC= 4.5 V 9 55 10, 11 83 VCC= 6.0 V 9 47 10, 11

41、 71 Propagation delay time, COUNT DOWN to BORROW or COUNT UP to CARRY 3/ tPHL4, tPLH4 CL= 50 pF 10% See figure 4 VCC= 2.0 V All 9 165 ns 10, 11 250 VCC= 4.5 V 9 33 10, 11 50 VCC= 6.0 V 9 28 10, 11 43 Transition time 4/ tTHL, tTLH CL= 50 pF 10% See figure 4 VCC= 2.0 V All 9 75 ns 10, 11 110 VCC= 4.5

42、V 9 15 10, 11 22 VCC= 6.0 V 9 13 10, 11 19 1/ For a power supply of 5.0 V 10%, the worst case output voltages (VOHand VOL) occur for HC at VCC= 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst case VIHand VILoccur at VCC= 5.5 V and 4.5 V, respectively. (The VIHvalu

43、e at 5.5 V is 3.85 V). The worst case leakage currents (IINand ICC) occur for CMOS at the higher voltage so the 6.0 V value should be used. Power dissipation capacitance (CPD), typically 100 pF, determines the no-load dynamic power consumption (PD) and the no-load dynamic current consumption (IS). W

44、here PD= CPDVCC2f + ICCVCCIS= CPDVCCf + ICCf is the frequency of the input signal. 2/ Test not required if applied as a forcing function for VOHor VOL. 3/ AC testing at VCC= 2.0 V and VCC= 6.0 V shall be guaranteed, if not tested, to the specified limits. 4/ Transition time (tTLH, tTHL), if not test

45、ed, shall be guaranteed to the specified limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87808 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Device typ

46、e All Case outlines E 2 Terminal number Terminal symbol Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 B QBQACOUNT DOWN COUNT UP QCQDGND D C LOAD CARRY BORROW CLEAR A VCC- - - - NC B QBQACOUNT DOWN NC COUNT UP QCQDGND NC D C LOAD CARRY NC BORROW CLEAR A VCCNC = No internal connec

47、tion FIGURE 1. Terminal connections. Count CLEAR LOAD Function UP DOWN H L H Count up H L H Count downX X H X Clear X X L L LoadH = High voltage level L = Low voltage level X = Irrelevant = Transition from low to high FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking

48、permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87808 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87808 DLA LAND AND M