DLA SMD-5962-87605 REV D-2011 MICROCIRCUIT LINEAR NEGATIVE VOLTAGE REGULATOR MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes to table I and editorial changes throughout. Change CAGE code to 67268. 90-05-21 M. A. Frye B Update drawing to current requirements. Editorial changes throughout. drw 05-08-09 Raymond Monnin C Update drawing as part of 5 year review.- jt

2、 11-01-03 C. SAFFLE D Page 6: Figure 1. Terminal connections. Make correction to terminal 8 to read “REG OUTPUT”. Editorial changes throughout. jt 11-06-27 C. SAFFLE CURRENT CAGE CODE 67268 THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV D D D D D D D D

3、 D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 PMIC N/A PREPARED BY MARCIA B. KELLEHER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D. A. DiCENZO AP

4、PROVED BY N. A. HAUCK MICROCIRCUIT, LINEAR, NEGATIVE VOLTAGE REGULATOR,MONOLITHIC SILICON DRAWING APPROVAL DATE 87-06-24 AMSC N/A REVISION LEVEL D SIZE A CAGE CODE 14933 5962-87605 SHEET 1 OF 9 DSCC FORM 2233 APR 97 5962-E293-11 Provided by IHSNot for ResaleNo reproduction or networking permitted wi

5、thout license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87605 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in a

6、ccordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-87605 01 I A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type. The device type identify the circuit fun

7、ction as follows: Device type Generic number Circuit function 01 LM104 Negative voltage regulator 1.2.2 Case outline. The case outline are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style I MACY1-X10 10 Can 1.2.3 Lead finish. The lead finish

8、 is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Input voltage 50 V Input-output voltage differential . 50 V 1/ Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) +300C Power dissipation (PD) . 500 mW Junction temperature (TJ) +150C Thermal r

9、esistance, junction-to-case (JC) . See MIL-STD-1835 Thermal resistance, junction-to-ambient (JA) 150C/W 1.4 Recommended operating conditions. Ambient operating temperature range (TA) -55C to +125C _ 1/ When external booster transistors are used, the minimum output-input voltage differential is incre

10、ased, in the worst case, by approximately 1 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87605 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABL

11、E DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT

12、OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103

13、 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Ord

14、er of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 I

15、tem requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manuf

16、acturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may m

17、ake modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow opti

18、on is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal conn

19、ections shall be as specified on figure 1 . 3.2.3 Logic diagram. The logic diagram shall be as specified on figure 2 . 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full a

20、mbient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part s

21、hall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/com

22、pliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. Provi

23、ded by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87605 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Con

24、ditions -55C TA +125C IREF= 1 mA, RSC= 25, +VIN= 0 V, VADJ=-1(1 mA)*R1 Group A subgroups Device type Limits Unit unless otherwise specified Min Max High level current limit sense voltage VSENSEHR7-R8 = 0, R1 = 2.4 k, -8 V -VIN -18 V, 1 All 520 730 mV VADJ= -2.4 V, VOUT= 0 V 2 280 540 Low level curre

25、nt limit sense voltage VSENSEL-18 V -VIN -50 V, VADJ= -2.4 V, VOUT= 0 V 1 All 580 760 mV R1 = 2.4 k 2 365 560 Quiescent current IQ1-40 V -VIN -50 V, VADJ= 0 V, VOUT= 0 V, RSC= 15, ILOAD= 0 mA 1, 2, 3 All 3 mA IQ2-42 V -VIN -50 V, VADJ= -20 V, VOUT= -40 V, 0 mA ILOAD 20 mA, R1 = 20 k 5 IQ3-VIN= -50 V

26、, VADJ= -5 V, VOUT= -10 V, ILOAD= 0 mA, R1 = 5 k, TA= +25C 1 3.5 Output voltage VOUT-VIN= -5 V, +VIN= 10 V, VADJ= 5 V, VOUT= 0 V, VREF= -5 V, TA= +25C 1 All -11 -9 V -VIN= -2 V, +VIN= 40 V, VADJ= 20 V, VOUT= 0 V, VREF= -2 V 1, 2, 3 -41 -39 -VIN= -10 V, +VIN= 40 V, VADJ= 20 V, VOUT= 0 V, VREF= -10 V

27、-41 -39 Output voltage change VOUT-VIN= -8 V to -50 V, VADJ= 0 V VREF= -8 V to -50 V 1, 2, 3 All 20 mV -VIN= -10 V to -8 V, VADJ= 0 V VREF= -8 V 20 Reference current IREF-8 V -VIN -50 V, VREF= -8 V VADJ= 0 V, VOUT= 0 V 1, 2, 3 All 0.9 1.11 mA Reference current change IREF-VIN= -50 V to -8 V, VREF= -

28、8 V 1 All 5 A 2, 3 7 -VIN= -8 V to -50 V, VREF= -VIN1 15 2, 3 20 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87605 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 5 DSCC FORM 2234 A

29、PR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions -55C TA +125C IREF= 1 mA, RSC= 25, +VIN= 0 V, VADJ=-1(1 mA)*R1 Group A subgroups Device type Limits Unit unless otherwise specified Min Max Line regulation VRLINE-VIN= -2 V to -10 V, IL= 0 mA, +VIN= 40 V, VADJ=

30、 20 V, 1 All 5 mV VOUT= 0 V 2, 3 10 -VIN= -2 V to -10 V, IL= 20 mA, +VIN= 40 V, 1 5 VADJ= 20 V, VOUT= 0 V, RSC = 15 2, 3 10 -VIN= -2 V to -40 V, IL= 0 mA, +VIN= 10 V, VADJ= 5 V, VOUT= 0 V, TA= +25C 1 150 Load regulation VRLOADIL= 0 mA to 20 mA, +VIN= 40 V VADJ= 20 V, VOUT= 0 V, VIN= -2 V, RSC = 15 1

31、, 2, 3 All 5 mV IL= 0 mA to 20 mA, +VIN= 40 V VADJ= 20 V, VOUT= 0 V, VIN= -10 V, RSC = 15 5 Ripple rejection RRC1-C9 = 10 F, f = 120 Hz, DCVIN= -49 V, DCVOUT= -40 V, IL= 20 mA, VRIPPLE= 1 V rms, TA= +25C 4 All 0.5 mV/V C1-C9 = 10 F, f = 120 Hz, DCVIN= -8 V, DCVOUT= 0 V, IL= 0 mA, VRIPPLE= 1 V rms, T

32、A= +25C 1.0 VOSof internal operational amplifier VOS-8 V -VIN -50 V, VADJ= 0 V, VOUT= 0 V, VREF= -8 V 1, 2, 3 All 15 mV -VIN= -50 V, VADJ= 0 V, VOUT= 0 V, VREF= -50 V 15 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SI

33、ZE A 5962-87605 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 6 DSCC FORM 2234 APR 97 Device type 01 Case outline I Terminal number Terminal symbol 1 ADJ 2 REF 3 REF SUPPLY 4 COMP 5 UNREG INPUT (-VIN) 6 CURRENT LIMIT 7 BOOSTER 8 REG OUTPUT 9 GROUND (+VIN) 10 NC NOTE: Pin 5 i

34、s connected to case. FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87605 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 FIGURE

35、 2. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87605 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 8 DSCC FORM 2234 APR 97 3.6 Certificate of compliance. A certifi

36、cate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime -VA prior to listing as an approved source of supply shall affirm that the manufacturers p

37、roduct meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notifi

38、cation of change to DLA Land and Maritime -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required docum

39、entation. Offshore documentation shall be made available onshore at the option of the reviewer. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38535, appendix A. 4.2 Screening. Screening shall be in accordance with method 5004 of M

40、IL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revision le

41、vel control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TA= +125C, minimum. b. Interim and

42、 final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. TABLE II. Electrical test requirements. MIL-STD-883 test requirements Subgroups (in accordance with MIL-STD-883,

43、method 5005, table I) Interim electrical parameters (method 5004) - - - Final electrical test parameters (method 5004) 1*, 2, 3, 4 Group A test requirements (method 5005) 1, 2, 3, 4 Groups C and D end-point electrical parameters (method 5005) 1, 2, 3, 4 * PDA applies to subgroup 1. Provided by IHSNo

44、t for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-87605 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL D SHEET 9 DSCC FORM 2234 APR 97 4.3 Quality conformance inspection. Quality conformance inspection shall be

45、in accordance with method 5005 of MIL-STD-883 including groups A, B, C, and D inspections. The following additional criteria shall apply. 4.3.1 Group A inspection. a. Tests shall be as specified in table II herein. b. Subgroups 5, 6, 7, 8, 9, 10 and 11 in table I, method 5005 of MIL-STD-883 shall be

46、 omitted. 4.3.2 Groups C and D inspections. a. End-point electrical parameters shall be as specified in table II herein. b. Steady-state life test conditions, method 1005 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under document revisio

47、n level control and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1005 of MIL-STD-883. (2) TA= +125C, minimum. (3) Test d

48、uration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 5. PACKAGING 5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535, appendix A. 6. NOTES 6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original equipment), design applications, a