DLA SMD-5962-86842 REV F-2013 MICROCIRCUIT DIGITAL ADVANCED LOWPOWER SCHOTTKY TTL AND GATE MONOLITHIC SILICON.pdf

《DLA SMD-5962-86842 REV F-2013 MICROCIRCUIT DIGITAL ADVANCED LOWPOWER SCHOTTKY TTL AND GATE MONOLITHIC SILICON.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-86842 REV F-2013 MICROCIRCUIT DIGITAL ADVANCED LOWPOWER SCHOTTKY TTL AND GATE MONOLITHIC SILICON.pdf（11页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change Table I, footnotes, tPLH, tPHL. Add figure 3. Editorial changes throughout. 88-04-04 M. A. Frye B Changes in accordance with NOR 5962-R201-92. -tvn 95-05-11 Tim Noh C Add “C” case. Revise per current boilerplate. -ljs 98-01-22 Raymond Monn

2、in D Update to current requirements. Editorial changes throughout. - gap 06-01-20 Raymond Monnin E Add device class V for case outline C. Editorial changes throughout. - gap 06-11-02 Raymond Monnin F Update drawing to current MIL-PRF-38535 requirements. - jt 13-02-27 C. SAFFLE THE ORIGINAL FIRST SHE

3、ET OF THIS DRAWING HAS BEEN REPLACED. REV SHEET REV SHEET REV STATUS REV F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY Monica L. Poelking DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AV

4、AILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY Raymond Monnin APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, ADVANCED LOW-POWER SCHOTTKY TTL, AND GATE, MONOLITHIC SILICON DRAWING APPROVAL DATE 87-08-19 AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 67268 5962

5、-86842 SHEET 1 OF 10 DSCC FORM 2233 APR 97 5962-E077-13 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86842 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1.

6、SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When availab

7、le, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following examples. For device classes M and Q: 5962 - 86842 01 C A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Case outline (see 1.2.4) Lead f

8、inish (see 1.2.5) / / Drawing number For device class V: 5962 - 86842 01 V C A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classe

9、s Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA de

10、vice. 1.2.2 Device type. The device type identify the circuit function as follows: Device type Generic number Circuit function 01 54ALS08 Quadruple two-input positive AND gate 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as lis

11、ted below. Since the device class designator has been added after the original issuance of this drawing, device classes M and Q designators will not be included in the PIN and will not be marked on the device. Device class Device requirements documentation M Vendor self-certification to the requirem

12、ents for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZ

13、E A 5962-86842 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style C GDIP1-T14 or CDIP2-T14 14 Dual-in-lin

14、e D GDFP1-F14 or CDFP2-F14 14 Flat package 2 CQCC1-N20 20 Square chip carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc minimum

15、to 7.0 V dc maximum Input voltage range (VI) -1.5 V dc at -18 mA to 7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) per device 2/ 22 mW Lead temperature (soldering, 10 seconds) . +300C Thermal resistance, junction-to-case (JC) . See MIL-STD 1835 Junction temperature (

16、TJ) . 175C Operating free-air temperature range . -55C to +125C 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc minimum to +5.5 V dc maximum Minimum high level input voltage (VIH) . +2.0 V Maximum low level input voltage (VIL) TC= +125C 0.7 V dc TC= -55C . 0.8 V dc TC= +25

17、C 0.8 V dc Case operating temperature range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of

18、 these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Ele

19、ctronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.dla.mil/quicksearch/ or from the Standardization Document Order Desk

20、, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Maximum power dissipation is defined as VCCx ICC, and

21、 must withstand the added PDdue to short circuit test; e.g., IOS. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86842 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234

22、APR 97 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQU

23、IREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or fu

24、nction as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall

25、be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as specified on figure 2. 3.2.3 Timin

26、g waveforms and test circuit. The test circuit and timing requirements shall be as specified on figure 3. 3.2.4 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herei

27、n, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electric

28、al tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has th

29、e option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certif

30、ication/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of

31、 compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (s

32、ee 6.6.2 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, t

33、he requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.

34、 3.8 Notification of change for device class M. For device class M, notification to DLA Land and Maritime-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For devi

35、ce class M, DLA Land and Maritime, DLA Land and Maritime s agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group ass

36、ignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 8 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86842 DLA LA

37、ND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C unless otherwise specified Group A subgroups Limits Unit 1/ 2/ Min Max High level output voltage VOHVIH= 2.0 V VCC= 4.5 V VIL=

38、 0.8 V 1, 3 2.5 V IOH= -0.4 mA 3/ 4/ VIL= 0.7 V 2 Low level output voltage VOLVIH= 2.0 V VCC= 4.5 V VIL= 0.8 V 1, 3 0.4 V IOL= 4.0 mA 4/ 5/ VIL= 0.7 V 2 Input clamp voltage VICVCC= 4.5 V IIN= -18 mA 1, 2, 3 -1.5 V High level input current IIH1VCC= 5.5 V, VIN= 2.7 V All other inputs = 0.0 V 1, 2, 3 2

39、0 A IIH2VCC= 5.5 V, VIN= 7.0 V All other inputs = 0.0 V 1, 2, 3 100 A Low level input current IILVCC= 5.5 V, VIN= 0.4 V All other inputs = 4.5 V 1, 2, 3 -0.1 mA Output current IOVCC= 5.5 V VOUT= 2.25 V 6/ 1, 2, 3 -20 -112 mA High level supply current ICCHVCC= 5.5 V VIN 4.5 V (All inputs) 1, 2, 3 2.4

40、 mA Low level supply current ICCLVCC= 5.5 V VIN 0.4 V (All inputs) 1, 2, 3 4.0 mA Functional tests See 4.3.1c 7/ 7, 8A ,8B Propagation delay time A, B to Y tPHLVCC= 4.5 V to 5.5 V CL= 50 pF 9, 10, 11 3 12.5 ns tPLHRL= 500 8/ See Figure 3 9, 10, 11 4 14 ns 1/ Unused inputs that do not directly contro

41、l the pin under test must be 2.5 V or 0.4 V. 2/ Unused inputs shall not exceed 5.5 V or go less than 0.0 V. No inputs shall be floated. 3/ One input to gate under test must be = VIH; the other inputs shall be 2.0 V. 4/ All outputs must be tested. In the case where only one input at VILmaximum or VIH

42、 minimum produces the proper output state, the test must be performed with each input being selected as the VIL maximum or VIH minimum input.5/ One input to gate under test must be = VIL, the other inputs shall be 2.0 V. 6/ The output conditions have been chosen to produce a current that closely app

43、roximates one-half of the true short circuit output current, IOS. Not more than one output will be tested at a time and the duration of the test condition shall not exceed one second. 7/ Functional tests shall be conducted at input test conditions of 0.0 V VIL VOLand VOH VIH VCC. 8/ The propagation

44、delay limits are based on single output switching. Unused inputs = 3.5 V or 0.3 V. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86842 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET

45、6 DSCC FORM 2234 APR 97 Case outlines C and D 2 Terminal number Terminal symbol Terminal symbol 1 1A NC 2 1B 1A 3 1Y 1B 4 2A 1Y 5 2B NC 6 2Y 2A 7 GND NC 8 3Y 2B 9 3A 2Y 10 3B GND 11 4Y NC 12 4A 3Y 13 4B 3A 14 VCC3B 15 NC 16 4Y 17 NC 18 4A 19 4B 20 VCCNC = no connection FIGURE 1. Terminal connections

46、. Each gate INPUTS OUTPUT A B Y L L L H L L L H L H H H Positive logic Y = AB H = high level voltage L = Low level voltage FIGURE 2. Truth table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86842 DLA LAND

47、 AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 NOTES: 1. CLincludes probe and jig capacitance. 2. All input pulses have the following characteristics: PRR 10 MHz., duty cycle = 50%, tr= tf= 3 ns 1 ns. 3. The outputs are measured one at a time with one input tr

48、ansition per measurement. FIGURE 3. Timing waveforms and test circuit. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86842 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-PRF-38535 or as m