DLA DSCC-VID-V62 11603-2010 MICROCIRCUIT LINEAR DUAL HIGH SPEED BiFET OPERATIONAL AMPLIFIER MONOLITHIC SILICON.pdf
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1、 REVISIONSLTR DESCRIPTION DATE APPROVEDPrepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV PAGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY RICK OFFICER DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY RAJ
2、ESH PITHADIA TITLE MICROCIRCUIT, LINEAR, DUAL, HIGH SPEED BiFET OPERATIONAL AMPLIFIER, MONOLITHIC SILICON 10-12-13 APPROVED BY CHARLES F. SAFFLE SIZE A CODE IDENT. NO. 16236 DWG NO. V62/11603 REV PAGE 1 OF 11 AMSC N/A 5962-V011-11 Provided by IHSNot for ResaleNo reproduction or networking permitted
3、without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11603 REV PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance dual, high speed bipolar field effect transistor (BiFET) operational amplifier microcir
4、cuit, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/
5、11603 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 AD712-EP Dual, high speed BiFET operational amplifier 1.2.2 Case outline(s). The case outline(s) are as specified herein. Outline lette
6、r Number of pins JEDEC PUB 95 Package style X 8 MS-012-AA Plastic small outline1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacture: Finish designator Material A Hot solder dip B Tin-lead plateC Gold plateD PalladiumE Gold flash p
7、alladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11603 REV PAGE 3 1.3 Absolute maximum ratings. 1/ Supply voltage (VS) 18 V Input voltage (VIN) 18 V 2/ Outpu
8、t short circuit duration . Indefinite Differential input voltage . +VSand -VSPower dissipation(PD) 14.4 mW Junction temperature range (TJ) -65C to +150C Storage temperature range (TSTG) -65C to +125C Lead temperature range (soldering, 60 seconds) . +300C Thermal resistance, junction to ambient (JC)
9、43C/W Thermal resistance, junction to ambient (JA) 100C/W 1.4 Recommended operating conditions. 3/ Supply voltage (VS) 15 V Operating temperature range (TA) . -55C to +125C 1/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress rati
10、ngs only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ For supply voltages less than 18 V, t
11、he absolute maximum voltage is equal to the supply voltage. 3/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer and/or distributor maintain no responsibility or liability for product used beyond the stated limits. Provided by
12、IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11603 REV PAGE 4 2. APPLICABLE DOCUMENTS JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies
13、 should be addressed to the Electronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufa
14、cturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditi
15、ons and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline. The case outline shall be as shown in 1.2.2
16、and figure 1. 3.5.2 Terminal connections. The terminal connections shall be as shown in figure 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DLA LAND AND MARITIME COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/11603 REV PAGE 5 TABLE I. E
17、lectrical performance characteristics. 1/ Test Symbol Conditions VS= 15 V unless otherwise specifiedTemperature, TADevice type Limits Unit Min Max Input offset voltage section 2/ Initial offset voltage VIO+25C 01 3 mV -55C to +125C 4 Initial offset voltage versus temperature VIO/ T +25C 01 20 V/C In
18、itial offset voltage versus supply VIO/ +25C 01 76 dB VS-55C to +125C 76 Long term offset stability +25C 01 15 typical V/ month Input bias current 3/ IIBVCM= 0 V +25C 01 75 pA +125C 77 nA VCM= 10 V +25C 100 pA Input offset current IIOVCM= 0 V +25C 01 25 pA +125C 26 nA Matching characteristics sectio
19、n Input offset voltage VIO+25C 01 3 mV -55C to +125C 4 Input offset voltage drift +25C 01 20 V/C Input bias current IIB+25C 01 25 pA Crosstalk At f = 1 kHz +25C 01 120 typical dB At f = 100 kHz 90 typical See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permi
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