DLA DSCC-VID-V62 04756 REV B-2013 MICROCIRCUIT LINEAR PRECISION PROGRAMMABLE REFERENCE MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Add device type 02. Update boilerplate to current revision. - CFS 06-07-06 Thomas M. Hess B Update boilerplate paragraphs to current requirements. - PHN 13-09-12 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARIT

2、IME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV B B B B B B B B B B B PAGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of dra

3、wing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, LINEAR, PRECISION PROGRAMMABLE REFERENCE, MONOLITHIC SILICON YY-MM-DD 04-11-04 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/04756 REV B PAGE 1 OF 11 AMSC N/A 5962-V083-13 Provided by IHSNot for ResaleNo reproduction or netw

4、orking permitted without license from IHSDEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04756 REV B PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance precision programmable reference microcircuit, with an operatin

5、g temperature range of -40C to +125C for device 01, and -55C to +125C for device 02. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engine

6、ering documentation: V62/04756 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). Device type Generic Circuit function 01 TL1431-EP Precision programmable reference 02 TL1431-EP Precision programmable reference 1.2.2 Case outline(s)

7、. The case outline(s) are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 8 JEDEC MS-012 Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot

8、 solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04756 REV B PAGE 3 1.3 Absolute maximum ratings. 1/ Cathode voltage (VKA) . 37 V 2/ Continuous

9、 cathode current range (IKA) -100 mA to 150 mA Reference input current range (I(ref) -50 A to 10 mA Package thermalimpedance (JA) 97C/W 3/ 4/ Operating virtual junction temperature (TJ) . 150C Continuous total power dissipation (PD): 5/ TA 25C . 1102 mW TA= 70C . 638.5 mW TA= 85C . 484 mW TA= 125C .

10、 72.1 mW Soldering lead temperature 1.6 mm (1/16 inch) from case for 10 seconds . 260C Storage temperature range (TSTG) . -65C to +150C 1.4 Recommended operating conditions. Cathode voltage range (VKA) . VI(ref)to 36 V Cathode current range (IKA) . 1 mA to 100 mA Operating free-air temperature range

11、 (TA): Device 01 -40C to +125C Device 02 -55C to +125C 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recom

12、mended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ All voltage values are with respect to Anode, unless otherwise noted. 3/ Temperature and/or supply voltages must be limited to ensure that the maximum dis

13、sipation rating is not exceeded. 4/ The package thermal impedance is calculated in accordance with JESD 51-7. 5/ The derating factor above TA= 25C is 10.3 mW/C. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHSDEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO

14、 SIZE A CODE IDENT NO. 16236 DWG NO. V62/04756 REV B PAGE 4 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 Registered and Standard Outlines for Semiconductor Devices JESD51-7 High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages (Copies of t

15、hese documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201-2107). 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 he

16、rein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and

17、 recommended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outl

18、ines shall be as shown in 1.2.2 and figure 1. 3.5.2 Functional block diagram. The functional block diagram shall be as shown in figure 2. 3.5.3 Terminal connections. The terminal connections shall be as shown in figure 3. 3.5.4 Test circuits. The test circuits shall be as shown in figure 4. Provided

19、 by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04756 REV B PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Conditions Temperature, TA2/ Device type Limits Unit Min Max Reference input voltage VI(ref)VKA= VI(ref)

20、See Figure 4, Test Circuit 1 25C All 2490 2510 mV Full range 2470 2530 Deviation of reference input voltage over full temperature range VI(dev)3/ VKA= VI(ref)See Figure 4, Test Circuit 1 Full range 55 mV Ratio of change in reference input voltage to the change in cathode voltage VI(ref)VKAVKA= 3 V t

21、o 36V See Figure 4, Test Circuit 2 Full range -2 mV/V Reference input current II(ref)R1 = 10 k, R2 = See Figure 4, Test Circuit 2 25C 2.5 A Full range 4 Deviation of reference input current over full temperature range II(dev)3/ R1 = 10 k, R2 = See Figure 4, Test Circuit 2 Full range 2 A Minimum cath

22、ode current for regulation IminVKA= VI(ref)See Figure 4, Test Circuit 1 25C 1 mA Off-state cathode current IoffVKA= 36 V, VI(ref)= 0 V See Figure 4, Test Circuit 3 25C 0.5 A Full range 2 Output impedance |zKA| 4/ VKA= VI(ref), f 1 kHz, IKA= 1 mA to 100 mA See Figure 4, Test Circuit 1 25C 0.4 See not

23、es on next sheet. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHSDEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04756 REV B PAGE 6 TABLE I. Electrical performance characteristics. 1/ 1/ Testing and other quality co

24、ntrol techniques are used to the extent deemed necessary to assure product performance over the specified temperature range. Product may not necessarily be tested across the full temperature range and all parameters may not necessarily be tested. In the absence of specific parametric testing, produc

25、t performance is assured by characterization and/or design. 2/ Full range is -40C to +125C for device 01, and -55C to +125C for device 02. 3/ The deviation parameters VI(dev)and II(dev)are defined as the differences between the maximum and minimum values obtained over the rated temperature range. Th

26、e average full-range temperature coefficient of the reference input voltage VI(ref)is defined as: | VI(ref)|( ppm/C ) = ( VI(dev)/VI(ref)at 25C ) x 106TAwhere: TAis the rated operating temperature range of the device. VI(ref)is positive or negative, depending on whether minimum VI(ref)or maximum VI(

27、ref), respectively, occurs at the lower temperature. 4/ The output impedance is defined as: |zKA| = VKA/IKAWhen the device is operating with two external resistors (see Test Circuit 2 of figure 4), the total dynamic impedance of the circuit is given by: |z| = V/I, which is approximately equal to |zK

28、A|( 1 + R1/R2 ). Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04756 REV B PAGE 7 Case X NOTES: 1. This drawing is subject to change without notice. 2. Falls within JEDEC MS-012. 3. All linear dimensions are shown in inches (

29、millimeters). Millimeters equivalents are given for general information only. 4. Body dimensions do not include mold flash or protrusion not to exceed 0.006 inches (0.15 millimeters). FIGURE 1. Case outlines. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from I

30、HSDEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04756 REV B PAGE 8 Case X Symbol Dimensions Inches Millimeters Min Max Min Max A - 0.069 - 1.75 A1 0.004 0.010 0.10 0.25 b 0.012 0.020 0.31 0.51 c 0.007 0.010 0.17 0.25 D 0.189 0.197 4.80 5.00 E 0.150 0.157 3.80

31、 4.00 E1 0.228 0.244 5.80 6.20 e 0.050 TYP 1.27 TYP L 0.016 0.050 0.40 1.27 FIGURE 1. Case outlines - Continued. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04756 REV B PAGE 9 FIGURE 2. Functional block diagram. Device type

32、 All Case outline X Terminal number Terminal symbol 1 2 3 4 5 6 7 8 CATHODE ANODE ANODE NC NC ANODE ANODE REF NC = No internal connection. ANODE terminals are connected internally. FIGURE 3. Terminal connections. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A

33、 CODE IDENT NO. 16236 DWG NO. V62/04756 REV B PAGE 10 FIGURE 4. Test circuits. Provided by IHSNot for Resale-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04756 REV B PAGE 11 4. VERIFICATION 4.1 Product assurance requirements. The manufacturer is responsi

34、ble for performing all inspection and test requirements as indicated in their internal documentation. Such procedures should include proper handling of electrostatic sensitive devices, classification, packaging, and labeling of moisture sensitive devices, as applicable. 5. PREPARATION FOR DELIVERY 5

35、.1 Packaging. Preservation, packaging, labeling, and marking shall be in accordance with the manufacturers standard commercial practices for electrostatic discharge sensitive devices. 6. NOTES 6.1 ESDS. Devices are electrostatic discharge sensitive and are classified as ESDS class 1 minimum. 6.2 Con

36、figuration control. The data contained herein is based on the salient characteristics of the device manufacturers data book. The device manufacturer reserves the right to make changes without notice. This drawing will be modified as changes are provided. 6.3 Suggested source(s) of supply. Identifica

37、tion of the suggested source(s) of supply herein is not to be construed as a guarantee of present or continued availability as a source of supply for the item. DLA Land and Maritime maintains an online database of all current sources of supply at http:/www.landandmaritime.dla.mil/Programs/Smcr/. Ven

38、dor item drawing administrative control number 1/ Device manufacturer CAGE code Vendor part number Top-Side Marking V62/04756-01XE 01295 TL1431QDREP 1431QE V62/04756-02XE 01295 TL1431MDREP 1431ME 1/ The vendor item drawing establishes an administrative control number for identifying the item on the

39、engineering documentation. CAGE code Source of supply 01295 Texas Instruments, Inc. Semiconductor Group 8505 Forest lane P.O. Box 660199 Dallas, TX 75243 Point of contact: U.S. Highway 75 South P.O. Box 84, M/S 853 Sherman, TX 75090-9493 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS