DLA DSCC-VID-V62 04612 REV A-2010 MICROCIRCUIT DIGITAL IEEE 1394b THREE PORT CABLE TRANSCEIVER ARBITER MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 10-01-19 Thomas M. Hess Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 PMIC N/A PREPARED B
2、Y Phu H. Nguyen DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing YY-MM-DD CHECKED BY Phu H. Nguyen TITLE MICROCIRCUIT, DIGITAL, IEEE 1394b THREE PORT CABLE TRANSCEIVER/ARBITER, MONOLITHIC SILICON 04-02-18 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG N
3、O. V62/04612 REV A PAGE 1 OF 11 AMSC N/A 5962-V024-10 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04612 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing document
4、s the general requirements of a high performance IEEE 1394b Three Port Cable transceiver/arbiter, with an operating temperature range of -40C to +85C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an ad
5、ministrative control number for identifying the item on the engineering documentation: V62/04612 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device type(s). 1/ Device type Generic Circuit function 01 TSB81BA3-EP IEEE 1394b Three Port Cable tra
6、nsceiver/arbiter 1.2.2 Case outline(s). The case outlines are as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 80 JEDEC MS-026 Plastic quad flatpack 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufactu
7、rer: Finish designator Material A Hot solder dip B Tin-lead plate C Gold plate D Palladium E Gold flash palladium Z Other 1.3 Absolute maximum ratings. 2/ Supply voltage range, (VDD) . -0.3 V to +4.0 V 3/ Input voltage range, (VI) . -0.5 V to VDD+ 0.5 V 3/ Output voltage range at any output, (VO) .
8、-0.5 V to VDD+ 0.5 V Continuous total power dissipation See dissipation rating table. Operating free air temperature, (TA) -40C to +85C Storage temperature range, (TSTG) -65C to +150C Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds . +260C _ 1/ Users are cautioned to review the manufact
9、urers data manual for additional user information relating to these devices. 2/ Stresses beyond those listed under “absolute maximum rating” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those i
10、ndicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 3/ All voltage values, except differential I/O bus voltage, are with respect to network ground. Provided by IHSNot for ResaleNo reproduc
11、tion or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04612 REV A PAGE 3 Dissipation Rating Table Case outline TA 25C Power rating Derating Factor 4/ Above TA= 25C TA= 70C Power Rating TA= 85C Power Rating X 5
12、/ 5.05 W 52.5 mW/C 2.69 W 1.9 W X 6/ 3.05 W 31.7 mW/C 1.62 W 1.15 W X 7/ 2.01 W 20.3 mW/C 1.1 W 792 mW 1.4 Recommended operating conditions. 8/ Supply voltage range (3.3 VDD) Source power node +3.0 V to +3.6 V Non source power node 9/ . +3.0 V to +3.6 V Supply voltage, (1.8 VDD) +1.85 V to +2.05 V H
13、igh level input voltage, (VIH) LREQ, CTL0, CTL1, D0-D7, LCK +2.6 V Minimum LKON/DS2, PC0, PC1, PC2, PD, BMODE 0.7VDDMinimum RESETz . 0.6VDDMinimum Low level input voltage, (VIL) LREQ, CTL0, CTL1, D0-D7, LCK +1.2 V Maximum LKON/DS2, PC0, PC1, PC2, PD, BMODE 0.2VDDMaximum RESETz . 0.3VDDMaximum Output
14、 current, (IOL/OH) CTL0, CTL1, D0-D7, CAN, LKON/DS2, PINT and PCLK . -4.0 mA to +4.0 mA Output current, (IO) TPBIAS outputs -5.6 mA to 1.3 mA Maximum junction temperature, (TJ) 10/ RJA= 19C/W, TA= 85C +99.1C RJA= 31.5C/W, TA= 85C . +108.4C RJA= 49.2C/W, TA= 85C . +121.5C 1394b Differential input vol
15、tage, (VID) Cable inputs, during data reception . +200 mV to +800 mV 1394a Differential input voltage, (VID) Cable inputs, during data reception . +118 mV to +260 mV Cable inputs, during arbitration +168 mV to +265 mV 1394a Common mode input voltage, (VIC) TPB cable inputs, source power node . +0.47
16、06 V to 2.515 V TPB cable inputs, non source power node +0.4706 V to 2.015 V 9/ Power up reset time, (tpu) RESETz input . 2 ms Minimum 11/ Receiver input jitter TPA, TPB cable inputs, S100 operation 1.08 ns Maximum TPA, TPB cable inputs, S200 operation 0.5 ns Maximum TPA, TPB cable inputs, S400 oper
17、ation 0.315 ns Maximum Receive input skew Between TPA and TPB cable inputs, S100 operation 0.8 ns Maximum Between TPA and TPB cable inputs, S200 operation 0.55 ns Maximum Between TPA and TPB cable inputs, S400 operation 0.5 ns Maximum 4/ This is the inverse of the traditional junction to ambient the
18、rmal resistance (RJA). 5/ 2 oz. Trace and cooper pad with solder. 6/ 2 oz. Trace and cooper pad without solder. 7/ For more information, see manufacturer package application. 8/ Use of this product beyond the manufacturers design rules or stated parameters is done at the users risk. The manufacturer
19、 and/or distributor maintain no responsibility or liability for product used beyond the stated limits. 9/ For a node that does not source power; see Section 4.2.2.2 in IEEE 1394a-2000. 10/ See RJA values listed in thermal characteristics, table I. 11/ Timer after valid clock received at PHY XI input
20、 terminal. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/04612 REV A PAGE 4 2. APPLICABLE DOCUMENTS IEEE Standard 1394b - IEEE Standard for High Speed Serial Bus
21、es Allowing Gigabit Signaling. (Applications for copies should be addressed to the Institute of Electrical and Electronic Engineers, 445 Hoes Lane, Piscataway, NJ 08854-4150 JEDEC PUB 95 Registered and Standard Outlines for Semiconductor Devices (Applications for copies should be addressed to the El
22、ectronic Industries Alliance, 2500 Wilson Boulevard, Arlington, VA 22201-3834 or online at http:/www.jedec.org) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or lo
23、go B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance
24、 characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outline(s). The case outline(s) shall be as shown in 1.2.2 and figure 1. 3.5.2 Term
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