IEC 60191-6-5-2001 Mechanical standardization of semiconductor devices - Part 6-5 General rules for the preparation of outline drawings of surface mounted semiconductor device pack.pdf

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1、INTERNATIONAL STANDARD IEC 60191-6-5 First edition 2001-08 Mechanical standardization of semiconductor devices Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for fine-pitch ball grid array (FBGA) Normalisation mcanique de

2、s dispositifs semiconducteurs Partie 6-5: Rgles gnrales pour la prparation des dessins dencombrement des dispositifs semiconducteurs montage en surface Guide de conception pour les botiers matriciels billes et pas fins (FBGA) Reference number IEC 60191-6-5:2001(E)Publication numbering As from 1 Janu

3、ary 1997 all IEC publications are issued with a designation in the 60000 series. For example, IEC 34-1 is now referred to as IEC 60034-1. Consolidated editions The IEC is now publishing consolidated versions of its publications. For example, edition numbers 1.0, 1.1 and 1.2 refer, respectively, to t

4、he base publication, the base publication incorporating amendment 1 and the base publication incorporating amendments 1 and 2. Further information on IEC publications The technical content of IEC publications is kept under constant review by the IEC, thus ensuring that the content reflects current t

5、echnology. Information relating to this publication, including its validity, is available in the IEC Catalogue of publications (see below) in addition to new editions, amendments and corrigenda. Information on the subjects under consideration and work in progress undertaken by the technical committe

6、e which has prepared this publication, as well as the list of publications issued, is also available from the following: IEC Web Site (www.iec.ch) Catalogue of IEC publications The on-line catalogue on the IEC web site (www.iec.ch/catlg-e.htm) enables you to search by a variety of criteria including

7、 text searches, technical committees and date of publication. On-line information is also available on recently issued publications, withdrawn and replaced publications, as well as corrigenda. IEC Just Published This summary of recently issued publications (www.iec.ch/JP.htm) is also available by em

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9、NTERNATIONAL STANDARD IEC 60191-6-5 First edition 2001-08 Mechanical standardization of semiconductor devices Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for fine-pitch ball grid array (FBGA) Normalisation mcanique des

10、 dispositifs semiconducteurs Partie 6-5: Rgles gnrales pour la prparation des dessins dencombrement des dispositifs semiconducteurs montage en surface Guide de conception pour les botiers matriciels billes et pas fins (FBGA) PRICE CODE IEC 2001 Copyright - all rights reserved No part of this publica

11、tion may be reproduced or utilized in any form or by any means, electronic or mechanical, including photocopying and microfilm, without permission in writing from the publisher. International Electrotechnical Commission 3, rue de Varemb Geneva, Switzerland Telefax: +41 22 919 0300 e-mail: inmailiec.

12、ch IEC web site http:/www.iec.ch E For price, see current catalogueCommission Electrotechnique InternationaleInternational Electrotechnical Commission 2 60191-6-5 IEC:2001(E) INTERNATIONAL ELECTROTECHNICAL COMMISSION MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES Part 6-5: General rules for the

13、 preparation of outline drawings of surface mounted semiconductor device packages Design guide for fine-pitch ball grid array (FBGA) FOREWORD 1) The IEC (International Electrotechnical Commission) is a worldwide organization for standardization comprising all national electrotechnical committees (IE

14、C National Committees). The object of the IEC is to promote international co-operation on all questions concerning standardization in the electrical and electronic fields. To this end and in addition to other activities, the IEC publishes International Standards. Their preparation is entrusted to te

15、chnical committees; any IEC National Committee interested in the subject dealt with may participate in this preparatory work. International, governmental and non-governmental organizations liaising with the IEC also participate in this preparation. The IEC collaborates closely with the International

16、 Organization for Standardization (ISO) in accordance with conditions determined by agreement between the two organizations. 2) The formal decisions or agreements of the IEC on technical matters express, as nearly as possible, an international consensus of opinion on the relevant subjects since each

17、 technical committee has representation from all interested National Committees. 3) The documents produced have the form of recommendations for international use and are published in the form of standards, technical specifications, technical reports or guides and they are accepted by the National Co

18、mmittees in that sense. 4) In order to promote international unification, IEC National Committees undertake to apply IEC International Standards transparently to the maximum extent possible in their national and regional standards. Any divergence between the IEC Standard and the corresponding nation

19、al or regional standard shall be clearly indicated in the latter. 5) The IEC provides no marking procedure to indicate its approval and cannot be rendered responsible for any equipment declared to be in conformity with one of its standards. 6) Attention is drawn to the possibility that some of the e

20、lements of this International Standard may be the subject of patent rights. The IEC shall not be held responsible for identifying any or all such patent rights. International Standard IEC 60191-6-5 has been prepared by subcommittee 47D: Mechanical standardization of semiconductor devices, of IEC tec

21、hnical committee 47: Semiconductor devices. The text of this standard is based on the following documents: FDIS Report on voting 47D/437/FDIS 47D/455/RVD Full information on the voting for the approval of this standard can be found in the report on voting indicated in the above table. This publicati

22、on has been drafted in accordance with the ISO/IEC Directives, Part 3.60191-6-5 IEC:2001(E) 3 The committee has decided that the contents of this publication will remain unchanged until 2003. At this date, the publication will be reconfirmed; withdrawn; replaced by a revised edition; or amended. A b

23、ilingual version of this publication may be issued at a later date. 4 60191-6-5 IEC:2001(E) MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES Part 6-5: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for fine-pitch ball grid array

24、 (FBGA) 1 Scope This part of IEC 60191 provides common outline drawings and dimensions for all types of structures and composed materials of fine-pitch ball grid array (hereinafter called FBGA), whose terminal pitch is less than, or equal to, 0,80 mm and whose package body outline is square. The dem

25、and for area array style packages exists according to the multi-functioning and high performance of electrical equipment. The object of this design guide is to standardize outlines and secure interchangeability of FBGA packages. The terminal pitch and package outlines of these fine-pitch array packa

26、ges are smaller than those of BGA packages. 2 Normative references The following normative documents contain provisions which, through reference in this text, constitute provisions of this part of IEC 60191. For dated references, subsequent amendments to, or revisions of, any of these publications d

27、o not apply. However, parties to agreements based on this part of IEC 60191 are encouraged to investigate the possibility of applying the most recent editions of the normative documents indicated below. For undated references, the latest edition of the normative document referred to applies. Members

28、 of IEC and ISO maintain registers of currently valid International Standards. IEC 60191-6:1990, Mechanical standardization of semiconductor devices Part 6: General rules for the preparation of outline drawings of surface mounted semiconductor device packages 3 Definitions For the purposes of this p

29、art of IEC 60191, the definitions contained in IEC 60191-6 as well as the following definitions apply. 3.1 flanged type type whose package body size (body length and width) consists of its own flange which is composed around the encapsulation or lid 3.2 type of real chip size type whose package body

30、 size (body length and width) consists of an encapsulation just around the real chip only60191-6-5 IEC:2001(E) 5 3.3 fine-pitch ball grid array (FBGA) packages with metal balls whose terminal pitch is less than, or equal to, 0,80 mm positioned in an array on the base plane of the package as external

31、 terminals. This package structure makes it possible to surface-mount the packages to the printed circuit board 3.4 material designation FBGA packages are classified according to the following two material designations: 3.4.1 plastic type (P-FBGA) plastic-type classification is assigned to packages

32、which consist of resin substrate as interposer material (e.g. glass-epoxy, polyimid) 3.4.2 ceramic type (C-FBGA) ceramic-type classification is assigned to packages which consist of ceramic substrate as interposer material 6 60191-6-5 IEC:2001(E) D E w SA w SB v 4 NOTE 1 S y1 S y A 1 A S Seating pla

33、ne NOTE 3 A1 A2 Even type Odd type A2 A1 S E nE nD A B e e ZE b S D ZD 123 A B C S x M A3 A4 B1 B2 B3 B4 A1 A2 NOTE 2 NOTE 2 IEC 1360/01 NOTE 1 Zone of a visible index on the top surface. NOTE 2 Datum A and B are the axes defined by the terminal positions indicated with datum targets. NOTE 3 Primary

34、 datum S and seating plane to be defined by the method of least squares of spherical crowns of land.60191-6-5 IEC:2001(E) 7 Table 1 Group 1: Dimensions appropriate to mounting and interchangeability Limits to be observed Ref. Min. Nom. Max. Recommended values for the dimensions mm Note n X 1, 2 nD X

35、 nE X A X A max. = 1,20, 1,70, 2,00 Includes heat slug Includes package warpage and tilt A1 X X X Min. Nom. Max. at e = 0,80 0,35 0,40 0,45 at e = 0,65 0,28 0,33 0,38 at e = 0,50 0,20 0,25 0,30 at e = 0,40 0,15 0,20 0,25 b X X X Min. Nom. Max. at e = 0,80 0,45 0,50 0,55 at e = 0,65 0,35 0,40 0,45 at

36、 e = 0,50 0,25 0,30 0,35 at e = 0,40 0,20 0,25 0,30 D X At flanged type D = 4,0, 5,0, 6,0, 7,0, 8,0, 9,0, 10,0, 11,0, 12,0, 13,0, 14,0, 15,0, 16,0, Dimension range shows nominal value 17,0, 18,0, 19,0, 20,0, 21,0 at type of real chip size D = from 3,1 to 21,0 E X at flanged type E = 4,0, 5,0, 6,0, 7

37、,0, 8,0, 9,0, 10,0, 11,0, 12,0, 13,0, 14,0, 15,0, 16,0, 17,0, 18,0, 19,0, 20,0, 21,0 at type of real chip size E = from 3,1 to 21,0 Dimension range shows nominal value e X e = 0,80, 0,65, 0,50, 0,40 v X v = 0,15 Includes burrs w X at e = 0,80 w = 0,20 at e = 0,65 w = 0,20 at e = 0,50 w = 0,20 at e =

38、 0,40 w = 0,15 x X at e = 0,80 x = 0,08 at e = 0,65 x = 0,08 at e = 0,50 x = 0,05 at e = 0,40 x = 0,05 8 60191-6-5 IEC:2001(E) Table 1 (continued) Limits to be observed Ref. Min. Nom. Max. Recommended values for the dimensions mm Note y X at e = 0,80 y = 0,10 at e = 0,65 y = 0,10 at e = 0,50 y = 0,0

39、8 at e = 0,40 y = 0,08 y1 X y1 = 0,2 NOTE 1 The values stipulated by the mathematical expression must be applied to the individual overall dimensional standards. NOTE 2 Symbol n refers to the total number of terminal positions. Table 2 Group 2: Dimensions appropriate to mounting and gauging Limits t

40、o be observed Ref. Min. Nom. Max. Recommended values for the dimensions mm Note b2 X at e = 0,80 b2 = 0,63 b2 = bmax. + x at e = 0,65 b2 = 0,53 at e = 0,50 b2 = 0,40 at e = 0,40 b2 = 0,35 e X e = 0,80, 0,65, 0,50, 0,40 eD X eD = e (nD 1) eE X eD = e (nE 1) Table 3 Group 3: Dimensions appropriate to

41、automated handling Limits to be observed Ref. Min. Nom. Max. Recommended values for the dimensions mm Note A X A max. = 1,20, 1,70, 2,00 Includes heat slug Includes package warpage and tilt D X D/E = 4,0, 5,0, 6,0, 7,0, 8,0, 9,0, 10,0, 11,0, 12,0, 13,0, 14,0, 15,0, 16,0, E X 17,0, 18,0, 19,0, 20,0,

42、21,0 y1 X y1 = 0,2 Table 4 Group 4: Dimensions for information only Limits to be observed Ref. Min. Nom. Max. Recommended values for the dimensions mm Note ZD X ZD = (D e (nD 1) / 2 ZE X ZE = (E e (nE 1) / 260191-6-5 IEC:2001(E) 9 Table 5 Dimensions and ball matrix e = 0,80 Maximum matrix family Max

43、imum matrix 1 row family E D nD nE n ZD ZE nD nE n ZD ZE 4 4 4 4 16 0,80 0,80 3 3 9 1,20 1,20 5 5 5 5 25 0,90 0,90 4 4 16 1,30 1,30 6 6 7 7 49 0,60 0,60 6 6 36 1,00 1,00 7 7 8 8 64 0,70 0,70 7 7 49 1,10 1,10 8 8 9 9 81 0,80 0,80 8 8 64 1,20 1,20 9 9 10 10 100 0,90 0,90 9 9 81 1,30 1,30 10 10 12 12 1

44、44 0,60 0,60 11 11 121 1,00 1,00 11 11 13 13 169 0,70 0,70 12 12 144 1,10 1,10 12 12 14 14 196 0,80 0,80 13 13 169 1,20 1,20 13 13 15 15 225 0,90 0,90 14 14 196 1,30 1,30 14 14 17 17 289 0,60 0,60 16 16 256 1,00 1,00 15 15 18 18 324 0,70 0,70 17 17 289 1,10 1,10 16 16 19 19 361 0,80 0,80 18 18 324 1

45、,20 1,20 17 17 20 20 400 0,90 0,90 19 19 361 1,30 1,30 18 18 22 22 484 0,60 0,60 21 21 441 1,00 1,00 19 19 23 23 529 0,70 0,70 22 22 484 1,10 1,10 20 20 24 24 576 0,80 0,80 23 23 529 1,20 1,20 21 21 25 25 625 0,90 0,90 24 24 576 1,30 1,30 e = 0,65 Maximum matrix family Maximum matrix 1 row family E

46、D nD nE n ZD ZE nD nE n ZD ZE 4 4 5 5 25 0,700 0,700 4 4 16 1,025 1,025 5 5 7 7 49 0,550 0,550 6 6 36 0,875 0,875 6 6 8 8 64 0,725 0,725 7 7 49 1,050 1,050 7 7 10 10 100 0,575 0,575 9 9 81 0,900 0,900 8 8 11 11 121 0,750 0,750 10 10 100 1,075 1,075 9 9 13 13 169 0,600 0,600 12 12 144 0,925 0,925 10

47、10 14 14 196 0,775 0,775 13 13 169 1,100 1,100 11 11 16 16 256 0,625 0,625 15 15 225 0,950 0,950 12 12 17 17 289 0,800 0,800 16 16 256 1,125 1,125 13 13 19 19 361 0,650 0,650 18 18 324 0,975 0,975 14 14 20 20 400 0,825 0,825 19 19 361 1,150 1,150 15 15 22 22 484 0,675 0,675 21 21 441 1,000 1,000 16

48、16 23 23 529 0,850 0,850 22 22 484 1,175 1,175 17 17 25 25 625 0,700 0,700 24 24 576 1,025 1,025 18 18 27 27 729 0,550 0,550 26 26 676 0,875 0,875 19 19 28 28 784 0,725 0,725 27 27 729 1,050 1,050 20 20 30 30 900 0,575 0,575 29 29 841 0,900 0,900 21 21 31 31 961 0,750 0,750 30 30 900 1,075 1,075 10

49、60191-6-5 IEC:2001(E) e = 0,50 Maximum matrix family Maximum matrix 1 row family E D nD nE n ZD ZE nD nE n ZD ZE 4 4 7 7 49 0,50 0,50 6 6 36 0,75 0,75 5 5 9 9 81 0,50 0,50 8 8 64 0,75 0,75 6 6 11 11 121 0,50 0,50 10 10 100 0,75 0,75 7 7 13 13 169 0,50 0,50 12 12 144 0,75 0,75 8 8 15 15 225 0,50 0,50 14 14 196 0,75 0,75 9 9