DLA SMD-5962-96566 REV H-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED SYNCHRONOUS 4-BIT UP DOWN DUAL CLOCK COUNTER MONOLITHIC SILICON.pdf
《DLA SMD-5962-96566 REV H-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED SYNCHRONOUS 4-BIT UP DOWN DUAL CLOCK COUNTER MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-96566 REV H-2012 MICROCIRCUIT DIGITAL ADVANCED CMOS RADIATION HARDENED SYNCHRONOUS 4-BIT UP DOWN DUAL CLOCK COUNTER MONOLITHIC SILICON.pdf(29页珍藏版)》请在麦多课文档分享上搜索。
1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R129-97. 96-11-21 Monica L. Poelking B Incorporate Revision A. Update boilerplate to MIL-PRF-38535 requirements. LTG 01-12-03 Thomas M. Hess C Add appendix A. Editorial changes throughout. - LTG 04-06-21 Thomas
2、 M. Hess D Add device type 02 and 03. Update appendix A. - PHN 07-09-27 Thomas M. Hess E Change footnote 7 in section 1.5. - PHN 07-11-05 Thomas M. Hess F Add footnote 9/ to section 1.5 for device types 02 and 03. Add footnote 6/ to table IB for maximum device cross section. Delete table III, Irradi
3、ation test connections. - jak 08-05-07 Thomas M. Hess G Update radiation features in section 1.5 and SEP test limit in table IB. - MAA 10-11-15 Muhammad A. Akbar H Add equivalent test circuit and footnote 5 in figure 4. MAA 12-05-10 Thomas M. Hess REV SHEET REV H H H H H H H H H H H H H H SHEET 15 1
4、6 17 18 19 20 21 22 23 24 25 26 27 28 REV STATUS REV H H H H H H H H H H H H H H OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Thomas M. Hess DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Thomas M. H
5、ess THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A APPROVED BY Monica L. Poelking MICROCIRCUIT, DIGITAL, ADVANCED CMOS, RADIATION HARDENED, SYNCHRONOUS 4-BIT UP/DOWN DUAL CLOCK COUNTER, MONOLITHIC SILICON DRAWING APPROVAL DATE 96-02-02 REVISIO
6、N LEVEL H SIZE A CAGE CODE 67268 5962-96566 SHEET 1 OF 28 DSCC FORM 2233 APR 97 5962-E289-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 SIZE A 5962-96566 REVISION LEVE
7、L H SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or I
8、dentifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example 5962 H 96566 01 V X C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designato
9、r Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535,
10、appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54ACS193 Radiation hardened, synchronous 4-bit
11、up/down dual clock counter 02 54ACS193E Enhanced, radiation hardened, synchronous 4-bit up/down dual clock counter 03 54ACS193E Enhanced, radiation hardened, synchronous 4-bit up/down dual clock counter 1.2.3 Device class designator. The device class designator is a single letter identifying the pro
12、duct assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Ca
13、se outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line X CDFP4-F16 16 Flat pack 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q an
14、d V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-96566 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL H SHEET 3 DSCC FORM 2234 APR 97 1.3 Ab
15、solute maximum ratings. 1/ 2/ 3/ Supply voltage range (VDD) -0.3 V dc to +7.0 V dc DC input voltage range (VIN) -0.3 V dc to VDD+ 0.3 V dc DC output voltage range (VOUT) . -0.3 V dc to VDD+ 0.3 V dc DC input current, any one input (IIN). 10 mA Latch-up immunity current (ILU) 150 mA Storage temperatu
16、re range (TSTG) . -65C to +150C Lead temperature (soldering, 5 seconds) +300C Thermal resistance, junction-to-case (JC): Case outline E . See MIL-STD-1835 Case outline X . 15.5C/W Junction temperature (TJ) +175C Maximum package power dissipation (PD): Device type 01 1.0 W Device type 02 and 03, case
17、 outline X 3.3 W 4/ 1.4 Recommended operating conditions. 2/ 3/ Supply voltage range (VDD): Device type 01 . +4.5 V dc to +5.5 V dc Device types 02 and 03 . +3.0 V dc to +5.5 V dc Input voltage range (VIN) +0.0 V dc to VDD Maximum low level input voltage (VIL) 0.3 VDDMinimum high level input voltage
18、 (VIH) . 0.7 VDD Output voltage range (VOUT). +0.0 V dc to VDDCase operating temperature range (TC) . -55C to +125C Maximum input rise and fall time at VDD= 4.5 V (tr, tf) . 1 ns/V 5/ 1.5 Radiation features. Maximum total dose available: Device type 01 (dose rate = 50 300 rads (Si)/s) . 5 x 105Rads
19、(Si) Device type 02 (effective dose rate = 1 rad (Si)/s) 1 x 106Rads (Si) 6/ Device type 03 (dose rate = 50 300 rads (Si)/s) . 5 x 105Rads (Si) Single event phenomenon (SEP): Device type 01: Effective LET, no upsets (see 4.4.4.4) 80 MeV/(mg/cm2) 8/ 7/ Effective LET, no latch-up (see 4.4.4.4) 120 MeV
20、/(mg/cm2) 8/ 7/ Device types 02 and 03: Effective LET, no upsets (see 4.4.4.4) 108 MeV/(mg/cm2) 8/ 7/ Effective LET, no latch-up (see 4.4.4.4) 120 MeV/(mg/cm2) 8/ 7/ Dose rate upset (20 ns pulse) 1 x 109Rads (Si)/s 8/ 9/ Dose rate latch-up . None 8/ Dose rate survivability . 1 x 1012Rads (Si)/s 8/ 1
21、/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ Unless otherwise specified, all voltages are referenced to VSS. 3/ The limits for the parameters specified herein shall a
22、pply over the full specified VDDrange and case temperature range of -55C to +125C unless otherwise specified. 4/ Per MIL-STD-883 method 1012.1 section 3.4.1, PD(Package) = (TJ (max) - TC(max) . JC5/ Derate system propagation delays by difference in rise time to switch point for tror tf 1 ns/V. 6/ De
23、vice type 02 is irradiated at dose rate = 50 - 300 rads (Si)/s in accordance with MIL-STD-883, method 1019, condition A, and is guaranteed to a maximum total dose specified. The effective dose rate after extended room temperature anneal = 1 rad (Si)/s per MIL-STD-883, method 1019, condition A, secti
24、on 3.11.2. 7/ Radiation testing is performed on the standard evaluation circuit. (SEC). 8/ Limits are guaranteed by design or process, but not production tested unless specified by the customer through the purchase order or contract. 9/ This limit is applicable for device type 01, 02, and 03 with VD
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