DLA SMD-5962-93168 REV B-2013 MICROCIRCUIT MEMORY DIGITAL CMOS ELECTRICALLY ERASABLE PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON.pdf
《DLA SMD-5962-93168 REV B-2013 MICROCIRCUIT MEMORY DIGITAL CMOS ELECTRICALLY ERASABLE PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON.pdf》由会员分享,可在线阅读,更多相关《DLA SMD-5962-93168 REV B-2013 MICROCIRCUIT MEMORY DIGITAL CMOS ELECTRICALLY ERASABLE PROGRAMMABLE LOGIC ARRAY MONOLITHIC SILICON.pdf(20页珍藏版)》请在麦多课文档分享上搜索。
1、REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R056-95 95-02-03 Michael A. Frye B Update boilerplate to meet current MIL-PRF-38535 requirements. - glg 13-11-15 Charles F. Saffle REV SHEET REV B B B B B SHEET 15 16 17 18 19 REV STATUS REV B B B B B B B B B B
2、B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY Jeff Bowling THIS DRAWING IS AVAILAALE FOR USE AY ALL DEPARTMENTS APPROVED BY Michael
3、Frye MICROCIRCUIT, MEMORY, DIGITAL, CMOS, ELECTRICALLY ERASABLE PROGRAMMABLE LOGIC ARRAY, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-09-08 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-93168 SHEET 1 OF 19 DSCC FORM 2233 APR 97 5962-E058-14 Provided
4、by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93168 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance cla
5、ss levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are ref
6、lected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 93168 01 M X A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2) Device class designator Case outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designat
7、or. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indic
8、ates a non-RHA device. 1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit function Access time 01 7192E 192-Macrocell EEPLD 20 ns 02 7192E 192-Macrocell EEPLD 15 ns 1.2.3 Device class designator. The device class designator is
9、a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qual
10、ification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CMGA7-P160 160 1/ pin grid array 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix
11、A. _ 1/ 160 = actual number of pins used, not maximum listed in MIL-STD-1835. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93168 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSC
12、C FORM 2234 APR 97 1.3 Absolute maximum ratings. 2/ Supply voltage range with respect to ground (VCC).-2.0 V dc to +7.0 V dc 3/ Programming supply voltage range with respect to ground (VPP).-2.0 V dc to +13.0 V dc 3/ DC input voltage range with respect to ground -2.0 V dc to +7.0 V dc 3/ DC VCCor GN
13、D current (IMAX) 800 mA DC output current, per pin IOUT + 25 mA Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) +260C Thermal resistance, junction-to-case (JC): . See MIL-STD-1835 Maximum power dissipation 4/ 4.0 W Temperature under bias range -65C to +135C Junction
14、temperature (TJ). +175C Endurance 100 erase/write cycles (minimum) Data retention 10 years (minimum) 1.4 Recommended operating conditions. Supply voltage range (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5 V dc to +5.5 V dc Input voltage range (VIN) . . . . .
15、 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0 V dc to VCCOutput voltage range (VOUT) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V dc to VCCInput rise time (tR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16、 . . . . . . . . . . . . 40 ns maximum Input fall time (tF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 ns maximum Case operating temperature range (TC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55C to +125C 6/ 2. APPLICABLE D
17、OCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF
18、DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 -
19、List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robins Avenue, Building 4D, Philadelphia, PA 19111-5094.) _ 2/ Stresses above the a
20、bsolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ Minimum dc input voltage is -0.3 V. During transitions, inputs may undershoot to -2.0 V or overshoot to +7.0 V for periods shorter than 20 ns u
21、nder no-load conditions. 4/ Must withstand the added PDdue to short circuit test (e.g., ISC). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-93168 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEV
22、EL B SHEET 4 DSCC FORM 2234 APR 97 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents are the issues of the documents cited in the solicitation. JEDEC INTERNATIONAL (JEDEC) JESD
23、 78 - IC Latch-Up Test. (Applications for copies should be addressed to JEDEC Solid State Technology Association, 3103 North 10thStreet, Suite 240-S, Arlington, VA 22201-2107; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that pr
24、epare or distribute the documents. These documents also may be available in or through libraries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing
- 1.请仔细阅读文档,确保文档完整性,对于不预览、不比对内容而直接下载带来的问题本站不予受理。
- 2.下载的文档,不会出现我们的网址水印。
- 3、该文档所得收入(下载+内容+预览)归上传者、原创作者;如果您是本文档原作者,请点此认领!既往收益都归您。
下载文档到电脑,查找使用更方便
10000 积分 0人已下载
下载 | 加入VIP,交流精品资源 |
- 配套讲稿:
如PPT文件的首页显示word图标,表示该PPT已包含配套word讲稿。双击word图标可打开word文档。
- 特殊限制:
部分文档作品中含有的国旗、国徽等图片,仅作为作品整体效果示例展示,禁止商用。设计者仅对作品中独创性部分享有著作权。
- 关 键 词:
- DLASMD596293168REVB2013MICROCIRCUITMEMORYDIGITALCMOSELECTRICALLYERASABLEPROGRAMMABLELOGICARRAYMONOLITHICSILICONPDF

链接地址:http://www.mydoc123.com/p-700348.html