DLA SMD-5962-89990 REV B-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS PHASE- LOCKED LOOP FILTER MONOLITHIC SILICON.pdf

《DLA SMD-5962-89990 REV B-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS PHASE- LOCKED LOOP FILTER MONOLITHIC SILICON.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-89990 REV B-2011 MICROCIRCUIT DIGITAL HIGH SPEED CMOS PHASE- LOCKED LOOP FILTER MONOLITHIC SILICON.pdf（17页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add more notes to figure 5, switching waveforms and test circuit. Update boilerplate to MIL-PRF-38535 requirements. Editorial changes throughout. - LTG 05-12-16 Thomas M. Hess B Update test condition VOHand VOLin table I. Update the boilerplate p

2、aragraphs to current requirements as specified in MIL-PRF-38535. - MAA. 11-11-10 Thomas M. Hess REV SHEET REV B B SHEET 15 16 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Marcia B. Kellleher DLA LAND AND MARITIME COLUMBUS, OHIO 4321

3、8-3990 http:/www.landandmaritime.dla.mil STANDARD MICROCIRCUIT DRAWING CHECKED BY William J. Johnson THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, DIGITAL, HIGH SPEED CMOS, PHASE-LOCKED LOOP FILTER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF

4、 DEFENSE DRAWING APPROVAL DATE 91-09-03 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89990 SHEET 1 OF 16 DSCC FORM 2233 APR 97 5962-E507-11 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89990 DLA L

5、AND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN).

6、The complete PIN is as shown in the following example: 5962-89990 01 E A Drawing number Device type (see 1.2.1) Case outline (see 1.2.2) Lead finish (see 1.2.3) 1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 54HC297 P

7、hase-locked loop filter 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style E GDIP1-T16 or CDIP2-T16 16 Dual-in-line 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A.

8、 1.3 Absolute maximum ratings. 1/ Supply voltage range (VCC) -0.5 V dc to +7.0 V dc DC input voltage range (VIN) -0.5 V dc to VCC+ 0.5 V dc DC output voltage range (VOUT) . -0.5 V dc to VCC+ 0.5 V dc DC input diode current . 20 mA DC output diode current . 20 mA DC drain current 25 mA DC VCCor GND c

9、urrent . 50 mA Storage temperature range (TSTG) . -65C to +150C Maximum power dissipation (PD) 2/ . 500 mW Lead temperature (soldering, 10 seconds) 300C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ) 175C 1.4 Recommended operating conditions. Supply voltage rang

10、e (VCC) +2.0 V dc to +6.0 V dc Input voltage range (VIN) 0.0 V dc to VCCOutput voltage range (VOUT) 0.0 V dc to VCCCase operating temperature range (TC) -55C to +125C Input rise or fall time (tr, tf): VCC= 2.0 V . 0 to 1000 ns VCC= 4.5 V . 0 to 500 ns VCC= 6.0 V . 0 to 400 ns 1/ Unless otherwise spe

11、cified, all voltages are referenced to ground. 2/ For TC= +100C to +125C, derate linearly at 8 mW/C to 300 mW. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89990 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-

12、3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions - Continued. Minimum setup time, D/U to KCP, ENCTRto KCP(ts): TC= +25C: VCC= 2.0 V . 100 ns VCC= 4.5 V . 20 ns VCC= 6.0 V . 17 ns TC= -55C to +125C: VCC= 2.0 V . 150 ns VCC= 4.5 V . 30 ns VCC= 6.0 V . 26 ns Mini

13、mum hold time, D/U to KCP, ENCTRto KCP(th): TC= +25C: VCC= 2.0 V . 0 ns VCC= 4.5 V . 0 ns VCC= 6.0 V . 0 ns TC= -55C to +125C: VCC= 2.0 V . 0 ns VCC= 4.5 V . 0 ns VCC= 6.0 V . 0 ns Minimum clock pulse width, KCP(tw1): TC= +25C: VCC= 2.0 V . 80 ns VCC= 4.5 V . 16 ns VCC= 6.0 V . 14 ns TC= -55C to +12

14、5C: VCC= 2.0 V . 120 ns VCC= 4.5 V . 24 ns VCC= 6.0 V . 20 ns Minimum clock pulse width, I/DCP(tw2): TC= +25C: VCC= 2.0 V . 125 ns VCC= 4.5 V . 25 ns VCC= 6.0 V . 21 ns TC= -55C to +125C: VCC= 2.0 V . 190 ns VCC= 4.5 V . 38 ns VCC= 6.0 V . 32 ns Maximum clock frequency, KCP(fMAX1): TC= +25C: VCC= 2.

15、0 V . 6 MHz VCC= 4.5 V . 30 MHz VCC= 6.0 V . 35 MHz TC= -55C to +125C: VCC= 2.0 V . 4 MHz VCC= 4.5 V . 20 MHz VCC= 6.0 V . 24 MHz Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89990 DLA LAND AND MARITIME CO

16、LUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions - Continued. Maximum clock frequency, I/DCP(fMAX2): TC= +25C: VCC= 2.0 V . 4 MHz VCC= 4.5 V . 20 MHz VCC= 6.0 V . 24 MHz TC= -55C to +125C: VCC= 2.0 V . 2 MHz VCC= 4.5 V . 13 MHz VCC= 6.0 V .

17、15 MHz 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or co

18、ntract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HAN

19、DBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 1

20、9111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3.

21、 REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manu

22、facturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Managem

23、ent (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify whe

24、n the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDAR

25、D MICROCIRCUIT DRAWING SIZE A 5962-89990 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on f

26、igure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. 3.2.5 Timing diagram. The timing diagram shall be as specified on figure 4. 3.2.6 Switching waveforms and test circuit. The switching waveforms and

27、 test circuit shall be as specified on figure 5. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The

28、 electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufa

29、cturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN d

30、evices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required f

31、rom a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DLA Land and Maritime-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PR

32、F-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DLA Land and Mariti

33、me -VA shall be required for any change that affects this drawing. 3.9 Verification and review. DLA Land and Maritime, DLA Land and Maritimes agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall b

34、e made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89990 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TAB

35、LE I. Electrical performance characteristics. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level output voltage VOHVIN= VIHmaximum or VILminimum IOH= -20 A VCC= 2.0 V 2/ 1, 2, 3 All 1.9 V VCC= 4.5 V 4.4 VCC= 6.0 V 2/ 5.9 VI

36、N= VIHminimum or VILmaximum IOH= -4.0 mA XORPDOUTECPDOUTVCC= 4.5 V 3.7 VIN= VIHminimum or VILmaximum IOH= -6.0 mA I/DOUTVIN= VIHminimum or VILmaximum IOH= -5.2 mA XORPDOUTECPDOUTVCC= 6.0 V 2/ 5.2 VIN= VIHminimum or VILmaximum IOH= -7.8 mA I/DOUTLow level output voltage VOLVIN= VIHminimum or VILmaxim

37、um IOL= +20 A VCC= 2.0 V 2/ 1, 2, 3 All 0.1 V VCC= 4.5 V 0.1 VCC= 6.0 V 2/ 0.1 VIN= VIHminimum or VILmaximum IOL= +4.0 mA XORPDOUTECPDOUTVCC= 4.5 V 0.4 VIN= VIHminimum or VILmaximum IOL= +6.0 mA I/DOUTVIN= VIHminimum or VILmaximum IOL= +5.2 mA XORPDOUTECPDOUTVCC= 6.0 V 2/ 0.4 VIN= VIHminimum or VILm

38、aximum IOL= =7.8 mA I/DOUTSee footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89990 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TA

39、BLE I. Electrical performance characteristics- Continued. Test Symbol Conditions 1/ -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max High level input voltage 3/ VIHVCC= 2.0 V 1, 2, 3 All 1.5 V VCC= 4.5 V 3.15 VCC= 6.0 V 4.2 Low level input voltage 3/ VILVCC=

40、 2.0 V 1, 2, 3 All 0.5 V VCC= 4.5 V 1.35 VCC= 6.0 V 1.8 Quiescent supply current ICCVIN= VCCor GND VCC= 6.0 V 1 All 8.0 A 2, 3 160 Input leakage current IINVIN= VCCor GND VCC= 6.0 V 1, 2, 3 All 1.0 A Input capacitance CINTC= 25C See 4.3.1c 4 All 10.0 pF Functional tests See 4.3.1d 7, 8 All Propagati

41、on delay time, I/DCPto I/DOUT4/ tPHL1, tPLH1CL= 50 pF See figure 5 VCC= 2.0 V 9 All 175 ns 10, 11 265 VCC= 4.5 V 9 35 10, 11 53 VCC= 6.0 V 9 30 10, 11 43 Propagation delay time, A1 to XORPDOUT, B to XORPDOUT 4/ tPHL2, tPLH2CL= 50 pF See figure 5 VCC= 2.0 V 9 All 150 ns 10, 11 225 VCC= 4.5 V 9 30 10,

42、 11 45 VCC= 6.0 V 9 26 10, 11 38 Propagation delay time, B to ECPDOUT, A2 to ECPDOUT4/ tPHL3, tPLH3CL= 50 pF See figure 5 VCC= 2.0 V 9 All 200 ns 10, 11 300 VCC= 4.5 V 9 40 10, 11 60 VCC= 6.0 V 9 34 10, 11 51 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking p

43、ermitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89990 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions 1/ -55C TC +125C unless otherwise spe

44、cified Group A subgroups Device type Limits Unit Min Max Output transition time, XORPDOUT, ECPDOUT5/ tTLH1, tTHL1CL= 50 pF See figure 5 VCC= 2.0 V 9 All 75 ns 10, 11 110 VCC= 4.5 V 9 15 10, 11 22 VCC= 6.0 V 9 13 10, 11 19 Out put transition time, I/DOUT5/ tTLH2, tTHL2CL= 50 pF See figure 5 VCC= 2.0

45、V 9 All 60 ns 10, 11 90 VCC= 4.5 V 9 12 10, 11 18 VCC= 6.0 V 9 10 10, 11 15 1/ For a power supply of 5.0 V 10%, the worst case output voltages (VOHand VOL) occur for HC at 4.5 V. Thus, the 4.5 V values should be used when designing with this supply. Worst cases VIHand VILoccur at VCC= 5.5 V and 4.5

46、V, respectively. (The VIHvalue at 5.5 V is 3.85 V). The worst case leakage currents (IINand ICC) occur for CMOS at the higher voltage and so the 6.0 V values should be used. Power dissipation capacitance (CPD), typically 40 pF, determines the no load dynamic power consumption, PD= CPD(VCCx VCC) f +

47、(ICCx VCC), and the no load dynamic current consumption, IS= CPDVCCf + ICC. 2/ Guaranteed, if not tested, to the limits specified in table I. 3/ Tests are not required if applied as a forcing function for VOHand VOLtests. 4/ AC testing at VCC= 2.0 V and VCC= 6.0 V shall be guaranteed, if not tested,

48、 to the specified limits. 5/ Transition times (tTLH, tTHL), if not tested, shall be guaranteed to the specified limits. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89990 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 Device type All Case outline E Terminal number Terminal symbol 1 2 3 4 5 6 7 8 9 10 11 12 13 14 1