DLA SMD-5962-86830 REV B-2010 MICROCIRCUIT MEMORY DIGITAL NMOS 8K X 8 EEPROM MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Editorial changes throughout. Table I changes include: VIH change, regrouped devices to different limits. Table II, subgroups changed. Figures have been combined, some deleted. Quality Assurance and Quality conformance inspection paragraphs chang

2、ed. Vendor CAGE number 34335 removed as a source of supply. The 01XX, 02XX, and the 05XX devices are inactive for new design 89-01-10 M. A. Frye B Update drawing to current requirements. Editorial changes throughout. ksr 10-03-19 Charles F. Saffle THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REP

3、LACED CURRENT CAGE CODE 67268 REV SHET REV B B B B B B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth S. Rice DEFENSE SUPPLY CENTER COLUMBUS STANDA

4、RD MICROCIRCUIT DRAWING CHECKED BY D. H. Johnson COLUMBUS, OHIO 43218-3990http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUIT, MEMORY, DIGITAL, NMOS, 8K X 8 EEPROM, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING A

5、PPROVAL DATE 87-04-30 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 14933 5962-86830 SHEET 1 OF 31 DSCC FORM 2233 APR 97 5962-E194-10 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86830 DEFENSE SUPPLY CENTER

6、COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The comp

7、lete PIN is as shown in the following example: 5962-86830 01 X_ A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Acess Write Write End of Write Device type Generic number Circuit

8、function time speed mode Indicator Endurance 01 250 ns 10 ms byte Rdy/BUSY 10,000 cycles 02 350 ns 10 ms byte Rdy/BUSY 10,000 cycles 03 300 ns 10 ms byte Rdy/BUSY 10,000 cycles 04 250 ns 1 ms byte 10,000 cycles 05 (see 6.4) (8K X 8 EEPROM) 250 ns 2 ms byte Rdy/BUSY 10,000 cycles 06 250 ns 10 ms byte

9、/page DATA Polling 10,000 cycles 07 350 ns 10 ms byte/page DATA Polling 10,000 cycles 08 250 ns 10 ms byte/page DATA Polling 10,000 cycles 09 300 ns 10 ms byte/page DATA Polling 10,000 cycles 10 350 ns 12 ms byte/page DATA Polling 10,000 cycles 1.2.2 Case outline(s). The case outline(s) are as desig

10、nated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X GDIP-T28, CDIP2-T28 28 dual-in-line package Y GQCC1-N32 32 rectangular chip carrier Z CDFP4-F28 28 flat package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 A

11、bsolute maximum ratings. 1/ Supply voltage range (VCC) - -0.3 V dc to +6.0 V dc Storage temperature range - -65C to +150C Maximum power dissipation (PD) - 1.0 W Lead temperature (soldering, 10 seconds) - +300C Junction temperature (TJ) 2/ - +175C Thermal resistance, junction-to-case (JC): Case outli

12、nes X, Y, and Z - See MIl-STD-1835 Input voltage range - -0.3 V dc to +6.25 V dc 3/ Data retention - 10 years (minimum) Endurance - 10,000 cycles/byte (minimum) all devices 1/ All voltages are referenced to VSS(ground). 2/ Maximum junction temperature shall not be exceeded except for allowable short

13、 duration burn-in screening conditions in accordance with method 5004 of MIL-STD-883. 3/ Does not apply to VH. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86830 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OH

14、IO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.4 Recommended operating conditions. 4/ Supply voltage (VCC) - +4.5 V dc to +5.5 V dc Case operating temperature range (TC) - -55C to +125C Input voltage, low (VIL) - -0.1 V dc to +0.8 V dc Input voltage, high (VIH) - +2.0 V dc to VCC+0.3

15、 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or con

16、tract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HAND

17、BOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19

18、111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3.

19、REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manuf

20、acturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Manageme

21、nt (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when

22、 the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table.

23、 The truth table shall be as specified on figure 2. 3.2.2.1 Unprogrammed or erased devices. The truth table for unprogrammed devices for contracts involving no altered item drawing shall be as specified on figure 2. When required in groups A, B, or C (see 4.3), the devices shall be programmed by the

24、 manufacturer prior to test with a minimum of 50 percent of the total number of gates programmed or to any altered item drawing pattern which includes at least 25 percent of the total number of gates programmed. 4/ All voltages are referenced to VSS(ground). Provided by IHSNot for ResaleNo reproduct

25、ion or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86830 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.2.2.2 Programmed devices. The truth tables for programmed devices shall be as specified b

26、y an attached altered item drawing. 3.2.3 Block diagrams. The block diagrams shall be as specified on figure 3. 3.2.4 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance c

27、haracteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Ma

28、rking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the o

29、ption of not marking the “5962-“ on the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance

30、 with MIL-PRF-38535 to identify when the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-V

31、A prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with

32、 each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. Defense Supply Center Columbus (DSCC), DSCCs agent, and the acquiring activity retain the optio

33、n to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Processing EEPROMS. All testing requirements and quality assurance provisions herein shall be satisfied by the manufacturer prior t

34、o delivery. 3.10.1 Erasure of EEPROMS. When specified, devices shall be erased in accordance with the procedures and characteristics specified in section 4 as applicable. Devices shall be shipped in the erased (logic “1s“) and verified state unless otherwise specified. 3.10.2 Programmability of EEPR

35、OMS. When specified, devices shall be programmed to the specified pattern using the procedures and characteristics specified in 6.7, 6.8, 6.9, and 6.10 as applicable. 3.10.3 Verification of erasure or programmability of EEPROMS. When specified, devices shall be verified as either programmed to the s

36、pecified pattern or erased. As a minimum, verification shall consist of reading the device per the procedures and characteristics specified in 6.7 through 6.10 as applicable. Any bit that does not verify to be in the proper state shall constitute a device failure, and shall be removed from the lot.

37、Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86830 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. T

38、est Symbol Conditions -55C TC+125C VSS= 0 V dc VCC +5.0 V 10% Group A subgroups Device type Limits Unit unless otherwise specified Min Max Supply current ICCCE = OE = VILAll I/Os = open 1, 2, 3 All 140 mA Other inputs = VCCSupply current (standby) ISBCE = VIH, OE = VILAll I/Os = open 1, 2, 3 All 70

39、mA Other inputs = VCCInput leakage current IILVIN= 0.1 to 5.5 V 1, 2, 3 All 10 A Output leakage current IOZVOUT= 0.1 to 5.5 V 1, 2, 3 All 10 A 1/ CE = OE = VIHLow level input voltage VIL1, 2, 3 All -0.1 0.8 V High level input voltage VIH1, 2, 3 All 2.0 VCC+ 0.5 V Low level output voltage VOLVCC= 4.5

40、 V, IOL= 2.1 mA, 1, 2, 3 All 0.45 V High level output voltage VOHVCC= 4.5 V, IOH= -400 A, 1, 2, 3 All 2.4 V Input capacitance 2/ CIVIN= 0 V, VCC= 5.0 V 4 All 10 pF TA= +25C, f = 1 MHz Output capacitance 2/ CO(see 4.3.1c) 4 All 12 pF Read cycle time tAVAV9, 10, 11 03,09 300 ns See figure 4, as applic

41、able 3/ 01,04, 05,06, 08 250 02,07, 10 350 Address access time tAVQVSee figure 4, as applicable 9, 10, 11 03,09 300 ns CE = OE = VIL3/ 01,04, 05,06, 08 250 02,07, 10 350 Output enable access time tOLQVSee figure 4, as applicable 9, 10, 11 01,04, 05,08 100 ns CE = VIL3/ 03,09 110 02,10 12006,07 150 S

42、ee footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86830 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical

43、performance characteristics - Continued. Test Symbol Conditions 3/ -55C TC+125C VSS= 0 V dc VCC +5.0 V 10% Group A subgroups Device type Limits Unit unless otherwise specified Min Max Chip enable access time tELQVSee figure 4, as applicable 9, 10, 11 03, 09 300 OE = VIL01, 04, 05, 06, 08 250 ns 02,

44、07, 10 350 Chip disable to output in high Z tEHQZSee figure 4, as applicable 9, 10, 11 01, 02, 03, 04, 05, 08, 09, 10 0 100 2/ 06 10 60 ns 07 10 80Output enable to output in low ZtOLQV2/ 9, 10, 11 01, 02, 04, 05, 06, 07 10 ns Output disable to output in high Z tOHQZ9, 10, 11 01, 02, 03, 04, 05, 08,

45、09, 10 0 100 2/ 06 10 60 ns 07 10 80Output hold from address changetAXQXSee figure 4, as applicable CE = OE = VIL9, 10, 11 All 0 ns Write cycle time tWCSee figure 4, as applicable 9, 10, 11 01, 02, 03, 06, 07, 08, 09 10 10 12 ms 04 1 05 2 Address set-up time tAVWLSee figure 4, as applicable CE = OE

46、= VIL9, 10, 11 03, 04, 08, 09, 50 3/ 10 60 ns 01, 02, 05, 06, 07 10 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86830 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-399

47、0 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 3/ -55C TC+125C VSS= 0 V dc VCC +5.0 V 10% Group A subgroups Device type Limits Unit unless otherwise specified Min Max Address hold time tWLAXSee figure 4, as applicable 9, 10, 11 04, 05 50 02, 10 100 ns 01, 03, 08 80 06, 07, 09 200 Write set-up timetELWL9, 10, 11 01-03, 05-10 0 ns 04 50 Write hold timetWHEH9, 10, 1