DLA SMD-5962-79010 REV G-2005 MICROCIRCUIT DIGITAL MICROPROCESSOR 8-BIT N-CHANNEL SINGLE CHIP MONOLITHIC SILICON《硅单片单片8比特N沟道微处理器 数字微型电路》.pdf

《DLA SMD-5962-79010 REV G-2005 MICROCIRCUIT DIGITAL MICROPROCESSOR 8-BIT N-CHANNEL SINGLE CHIP MONOLITHIC SILICON《硅单片单片8比特N沟道微处理器 数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-79010 REV G-2005 MICROCIRCUIT DIGITAL MICROPROCESSOR 8-BIT N-CHANNEL SINGLE CHIP MONOLITHIC SILICON《硅单片单片8比特N沟道微处理器 数字微型电路》.pdf（15页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Sheet 2 VIHcorrection. Sheet 4 IIH, IILconditions. Sheet 8 add note 4/. Sheet 13 Table III subgroups. Sheet 18 vendor type corrected. 80-08-22 N. A. Hauck B Deleted table II and IIb. Removed unnecessary test. Subgroups line 4.4.1. 82-02-24 C. R.

2、Jackson C Convert to approved source format. Complete document revision. 82-11-30 N. A. Hauck D Add one vendor; FSCM 34335. Table I, delete VILmin. 85-10-28 N. A. Hauck E Remove vendor; FSCM 34335 as source of supply. Update boilerplate 95-04-20 Monica L. Poelking F Modify paragraphs 3.1 and 3.5.1 t

3、o allow product to be marked with “QD” certification mark. Make changes to table II. Update boilerplate. TVN 00-10-05 Monica L. Poelking G Correct marking requirements in 3.5. Update boilerplate in accordance with MIL-PRF-38535 requirements. Editor change through. - PHN 05-02-17 Thomas M. Hess REV S

4、HET REV SHET REV STATUS REV G F G G F F F F F G G G G G OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Michael A. Frye STANDARD MICROCIRCUIT DRAWING CHECKED BY A. J. Foley DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE

5、 FOR USE BY ALL DEPARTMENTS APPROVED BY C. R. Jackson AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 79-08-06 MICROCIRCUIT, DIGITAL, MICROPROCESSOR, 8-BIT N-CHANNEL, SINGLE CHIP, MONOLITHIC SILICON SIZE A CAGE CODE 67268 79010 AMSC N/A REVISION LEVEL G SHEET 1 OF 14 DSCC FORM 2233 A

6、PR 97 5962-E175-05 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79010 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing des

7、cribes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 79010 01 Q X Drawing number Device type (see 1.2.1) Case outline(see 1.

8、2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 8085A 8-bit channel, fixed instruction microprocessor 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follo

9、ws: Outline letter Descriptive designator Terminals Package style Q GDIP1-T40 or CDIP2-T40 40 Dual-in-line package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Supply voltage range -0.5 V dc to +7 V dc Maximum power dissipation (PD) 1

10、.5 mW Storage temperature range -65C to +150C Lead temperature (soldering, 5 seconds). +270C Thermal resistance, junction-to-case (JC) . See MIL-STD-1835 Junction temperature (TJ). +150C 1.4 Recommended operating conditions. Supply voltage range: VCC5.0 V 10% VSS0.0 V Minimum high level input voltag

11、e (logic inputs) 2.2 V Maximum low level input voltage (logic inputs). 0.8 V Minimum high level output voltage . 2.4 V Maximum low level output voltage 0.45 V dc Frequency of operation 0.5 MHz to 3.0 MHz Case operating temperature range (TC) . -55C to +125C Provided by IHSNot for ResaleNo reproducti

12、on or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79010 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following spe

13、cification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General

14、Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawi

15、ngs. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the

16、text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements shall

17、be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer who has been granted transitional certification t

18、o MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifications to the requirements herein. These modif

19、ications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used. This drawing has been modified to allow the m

20、anufacturer to use the alternate die/fabrication requirements of paragraph A.3.2.2 of MIL-PRF-38535 or other alternative approved by the qualifying activity. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, a

21、ppendix A and herein. 3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Timing waveforms. The timing waveforms shall be as specified on figure 2. Provided by IHSNot for Re

22、saleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79010 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL G SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, t

23、he electrical performance characteristics are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described

24、in table I. 3.5 Marking. Marking shall be in accordance with MIL-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN de

25、vices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when the QML flow option is used. For product built in accordance with A.3.2.2 of MIL-PRF-38535, or as modified i

26、n the manufacturers QM plan, the “QD” certification mark shall be used in place of the “Q“ or “QML“ certification mark. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 here

27、in). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as requir

28、ed in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring acti

29、vity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIR

30、CUIT DRAWING SIZE A 79010 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions -55C TC +125C unless otherwise specified Device type Group A subgroups Min Max Unit Input l

31、ow level, RESET input 1/ VILVCC= 5 V 10% All 1, 2, 3 0.8 V Input high level, RESET input 1/ VIHVCC= 5 V 10% All 1, 2, 3 2.4 V Low level output voltage, all outputs VOLVCC= 4.5 V, IOL= 1.6 mA All 1, 2, 3 0.45 V High level output voltage, all outputs VOHVCC= 4.5 V, IOH= -400 A All 1, 2, 3 2.4 V Low le

32、vel input current, all inputs 2/ IILVCC= 5.5 V VIN= 0.0 V All 1, 2, 3 10 A High level input current, all inputs 2/ IIHVCC= 5.5 V VIN= 5.5 V All 1, 2, 3 10 A High impedance (off- state) output current (low) IOLZVCC= 5.5 V VOUT= 0.45 V All 1, 2, 3 10 A High impedance (off- state) output current (high)

33、 IOHZVCC= 5.5 V VOUT= 5.0 V All 1, 2, 3 10 A Supply current ICCVCC= 5.5 V All 1, 2, 3 200 mA Functional test See 4.3.1c All 7, 8 Clock pulse tCYCAll 9, 10 0.32 2.0 s Clock pulse width o1 to180 ns Clock pulse width o2 to2All 9, 10 120 ALE pulse widthtP1140 ns CLK rise and fall timetr, tf All 9, 10 30

34、 ns Propagation delay time, low to high, X1 CLK tPLH1All 9, 30 120 Propagation delay time, high to low, X1 CLK tPHL1All 9, 10 30 150 ns HOLD input hold time to trailing edge of CLK tHDAll 9, 10 0 ns HOLD setup time to trailing edge of CLK tHSAll 9, 10 170 ns INTR input hold time to trailing edge of

35、CLK tIHVCC= 5 V 10% VSS= 0.0 V tCY= 320 ns 3/ 4/ CL= 150 pF 10%, all outputs All 9, 10 0 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79010 DEFENSE SUPPLY CENTER COLUMBUS COLUM

36、BUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions -55C TC +125C unless otherwise specified Device type Group A subgroups Min Max Unit INTR, RST, and TRAP setup time to falling edge of CLK tIS

37、All 9, 10 160 ns Address hold time after ALE tLAVCC= 5 V 10% VSS= 0.0 V tCY= 320 ns 3/ 4/ CL= 150 pF 10%, all outputs All 9, 10 100 ns Trailing edge of ALE to leading edge of control tLCAll 9, 10 130 ns ALE low during CLK high tLCKAll 9, 10 100 ns CLK operating frequency range fOMAll 9, 10 0.5 3.0 M

38、Hz ALE to valid data during reading tLDRAll 9, 10 460 ns ALE to valid data during write tLDWAll 9, 10 200 ns ALE to READY stable tLRYAll 9, 10 110 ns Trailing edge of RD to re-enabling of address tRAE150 RD (or INTA ) to valid data tRDAll 9, 10 300 ns Control trailing edge to leading edge of next co

39、ntrol tRVAll 9, 10 400 ns Data hold time after RD (INTA ) tRDHAll 9, 10 0 ns READY hold time tRYHAll 9, 10 ns READY setup time to leading edge of CLK tRYS110 Data valid after trailing edge of WR tWD All 9, 10 100 ns Leading edge of WR to data valid tWDL All 9, 10 40 ns A8-15valid to leading edge of

40、control 5/ tAC All 9, 10 270 ns A0-7valid to leading edge of control tACL All 9, 10 240 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79010 DEFENSE SUPPLY CENTER COLUMBUS COLUMB

41、US, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions -55C TC +125C unless otherwise specified Device type Group A subgroups Min Max Unit A0-15valid to valid data IN tADAll 9, 10 575 ns Address fl

42、oat after leading edge of RD (INTA ) tAFRAll 9, 10 0 ns A8-15valid before trailing edge of ALE 5/ tAL(MIN) All 9, 10 70 ns A0-7valid before trailing edge of ALE tALL(MIN) All 9, 10 70 ns READY valid from address valid tARYVCC= 5 V 10% VSS= 0.0 V tCY= 320 ns 3/ 4/ CL= 150 pF 10%, all outputs All 9, 1

43、0 220 ns Address (A8-A15) valid after control tCAAll 9, 10 120 ns Width of control low ( RD , WR ,INTA ) edge of ALE tCCAll 9, 10 400 ns Trailing edge of control to leading edge of ALE tCLAll 9, 10 50 ns Data valid to trailing edge of WR tDWAll 9, 10 420 ns HLDA to bus enable tHABEAll 9, 10 210 ns B

44、us float after HLDA tHABF210 HLDA valid to trailing edge of CLK tHACKAll 9, 10 110 ns 1/ Upon power-up IN RESET must remain low for at least 10 ms after minimum VCChas been reached. 2/ Except pins 1 and 2. 3/ All timings are measured at output voltage VL= 0.8 V, VH= 2.0 V and 1.5 V with 20 ns rise o

45、r fall time on INPUTS. See figure 2. 4/ Output timings are measured with purely capacitive load. 5/ A8 A15address specs apply to IO/ M , S0, and S1except A8 A15are undefined during T4 T6of cycle whereas IO/ M , S0, and S1are stable. Provided by IHSNot for ResaleNo reproduction or networking permitte

46、d without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79010 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 Device type All Case outline Q Terminal number Terminal symbol Terminal number Terminal symbol 1 X1 21 A8 2 X2 22 A9 3 RES

47、ET OUT 23 A10 4 SOD 24 A115 SID 25 A126 TRAP 26 A137 RST 7.5 27 A148 RST 6.5 28 A159 RST 5.5 29 S0 10 INTR 30 ALE 11 INTA 31 WR 12 AD0 32 RD 13 AD1 33 S1 14 AD234 IO/ M 15 AD335 READY 16 AD436 IN RESET 17 AD537 CLK (OUT) 18 AD638 HLDA 19 AD739 HOLD 20 VSS 40 VCC FIGURE 1. Terminal connections. Provi

48、ded by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79010 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 9 DSCC FORM 2234 APR 97 NOTE: tr= tf= 30 ns maximum. FIGURE 2a. Clock timing waveforms. FIGURE 2b. Basic system timing waveforms. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 79010 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO