DLA DSCC-VID-V62 05615 REV A-2012 MICROCIRCUIT LINEAR INTERCONNECT EXTENDER CHIPSET WITH LVDS MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Update boilerplate paragraphs to current requirements. - PHN 12-01-19 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing RE
2、V PAGE REV PAGE REV STATUS OF PAGES REV A A A A A A A A A A A A A A PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date of drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, LINEAR, INTERCONNECT EX
3、TENDER CHIPSET WITH LVDS, MONOLITHIC SILICON YY-MM-DD 05-08-30 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/05615 REV A PAGE 1 OF 14 AMSC N/A 5962-V022-12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, C
4、OLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05615 REV A PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance interconnect extender chipset with LVDS microcircuit, with an operating temperature range of -40C to +125C. 1.2 Vendor Item Draw
5、ing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/05615 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (
6、See 1.2.2) (See 1.2.3) 1.2.1 Device types. Device type Generic Circuit function 01 SN65LVDT14-EP Interconnect extender chipset with LVDS, one driver plus four receivers 02 SN65LVDT41-EP Interconnect extender chipset with LVDS, four drivers plus one receiver 1.2.2 Case outlines. The case outlines are
7、 as specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 20 JEDEC MO-153 Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead p
8、late C Gold plate D Palladium E Gold flash palladium Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05615 REV A PAGE 3 1.3 Absolute maximum ratings. 1/ 2/ Supply
9、voltage range (VCC) . -0.5 V to +4 V 2/ Input voltage range: D or R -0.5 V to +6 V A, B, Y, or Z. -0.5 V to +4 V Electrostatic discharge: Human-body model: 3/ A, B, Y, Z, and GND 12 kV All pins . 8 kV Charged-device model: 4/ All pins . 500 V Continuous power dissipation: TA3.15 V) . 2.4 - |VID|/2 O
10、perating free-air temperature range (TA) -40C to +125C FIGURE 1. VICvs VIDand VCC. _ 5/ See figure 1. The minimum VICrelation with VIDis the linear relation |VID|/2 shown at the bottom of figure 1. For maximum VICvalues, the relation with VIDdepends on the operating VCCcondition shown at the top of
11、figure 1. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05615 REV A PAGE 5 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEDEC PUB 95
12、Registered and Standard Outlines for Semiconductor Devices JESD 22-A114 - Electrostatic Discharge (ESD) Sensitivity Testing Human Body Model (HBM) JESD 22-C101 - Field-Induced Charged-Device Model Test Method for Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components (Copies of t
13、hese documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology Association, 3103 North 10th Street, Suite 240S, Arlington, VA 22201.) 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein
14、and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identification (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and reco
15、mmended operating conditions and electrical performance characteristics are as specified in 1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines
16、shall be as shown in 1.2.2 and figure 2. 3.5.2 Logic diagram and function tables. The logic diagram and function tables shall be as shown in figure 3. 3.5.3 Terminal connections. The terminal connections shall be as shown in figure 4. 3.5.4 Switching waveforms and test circuits. The switching wavefo
17、rms and test circuits shall be as shown in figures 5a 5f. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05615 REV A PAGE 6 TABLE I. Electrical performance charac
18、teristics. 1/ Test Symbol Test conditions unless otherwise specified Device type Limits Unit Min Typ Max Receiver Electrical Characteristics 2/ Positive-going differential input voltage threshold VITH+See figure 5a. All 100 mV Negative-going differential input voltage threshold VITH-100 mV High-leve
19、l output voltage VOHIOH= -8 mA 2.4 V Low-level output voltage VOLIOL= 8 mA 0.4 V Input current (A or B inputs) IIVI= 0 V and VI= 2.4 V, Other input open. 40 A Power-off input current (A or B inputs) II(OFF)VCC= 0 V, VI= 2.4 V 40 A Input capacitance, A or B input to GND CiVI= A sin 2ft + CV 5 pF Term
20、ination impedance ZtVID= 0.4 sin 2.5E09 t V 88 132 Driver Electrical Characteristics 2/ Differential output voltage magnitude |VOD| RL = 100 See figures 5b and 5d. All 247 340 454 mV Change in differential output voltage magnitude between logic states |VOD| -50 50 mV Steady-state common-mode output
21、voltage VOC(SS)See figure 5e. 1.125 1.375 V Change in steady-state common-mode output voltage between logic states VOC(SS)-50 50 mV Peak-to-peak common-mode output voltage VOC(PP)50 mV High-level input current IIHVIH= 2 V 20 A Low-level input current IILVIL= 0.8 V 10 A Short-circuit output current I
22、OSVOYor VOZ= 0 V 24 mA VOD= 0 V 3/ 12 Power-off output current IO(OFF)VCC= 1.5 V, VO= 2.4 V 1 A Device Electrical Characteristics 2/ Supply current ICCDriver RL= 100 , Driver VI= 0.8 V or 2 V, Receiver VI= 0.4 V 01 25 mA 02 35 See footnotes at end of table. Provided by IHSNot for ResaleNo reproducti
23、on or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05615 REV A PAGE 7 TABLE I. Electrical performance characteristics - Continued. 1/ Test Symbol Test conditions unless otherwise specified Device type Limits
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