DLA DSCC-VID-V62 05614 REV B-2013 MICROCIRCUIT DIGITAL-LINEAR HIGH-SPEED DIFFERENTIAL RECEIVER MONOLITHIC SILICON.pdf
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1、 REVISIONS LTR DESCRIPTION DATE APPROVED A Add device type 02 information. Update boilerplate. - CFS 07-05-08 Thomas M. Hess B Update boilerplate paragraphs to current requirements. - PHN 13-11-18 Thomas M. Hess CURRENT DESIGN ACTIVITY CAGE CODE 16236 HAS CHANGED NAMES TO: DLA LAND AND MARITIME COLU
2、MBUS, OHIO 43218-3990 Prepared in accordance with ASME Y14.24 Vendor item drawing REV PAGE REV PAGE REV STATUS OF PAGES REV B B B B B B B B B B B B B PAGE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO 43218-3990 Original date o
3、f drawing CHECKED BY Charles F. Saffle TITLE MICROCIRCUIT, DIGITAL-LINEAR, HIGH-SPEED DIFFERENTIAL RECEIVER, MONOLITHIC SILICON YY-MM-DD 05-10-19 APPROVED BY Thomas M. Hess SIZE A CODE IDENT. NO. 16236 DWG NO. V62/05614 REV B PAGE 1 OF 14 AMSC N/A 5962-V006-14 Provided by IHSNot for ResaleNo reprodu
4、ction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05614 REV B PAGE 2 1. SCOPE 1.1 Scope. This drawing documents the general requirements of a high performance high-speed differential receiver microcircuit
5、, with an operating temperature range of -55C to +125C. 1.2 Vendor Item Drawing Administrative Control Number. The manufacturers PIN is the item of identification. The vendor item drawing establishes an administrative control number for identifying the item on the engineering documentation: V62/0561
6、4 - 01 X E Drawing Device type Case outline Lead finish number (See 1.2.1) (See 1.2.2) (See 1.2.3) 1.2.1 Device types. Device type Generic Circuit function 01 SN65LVDS33-EP High-speed differential receiver 02 SN65LVDT33-EP High-speed differential receiver 1.2.2 Case outlines. The case outlines are a
7、s specified herein. Outline letter Number of pins JEDEC PUB 95 Package style X 16 JEDEC MS-012 Plastic small-outline 1.2.3 Lead finishes. The lead finishes are as specified below or other lead finishes as provided by the device manufacturer: Finish designator Material A Hot solder dip B Tin-lead pla
8、te C Gold plate D Palladium E Gold flash palladium Z Other Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05614 REV B PAGE 3 1.3 Absolute maximum ratings. 1/ 2/ S
9、upply voltage range (VCC) . -0.5 V to +4 V 2/ Voltage range: Enables or Y -1 V to +6 V A or B -5 V to +6 V |VA VB| (Device 02 only) . 1 V Electrostatic discharge: A, B, and GND Class 3, A: 15 kV, B: 500 V 3/ Charged-device mode: All pins 500 V 4/ Continuous power dissipation: TA 25C power rating 950
10、 mW TA= 85C power rating 494 mW TA= 125C power rating 189 mW Operating factor above TA= 25C . 7.6 mW/C 5/ Storage temperature range (TSTG) . -65C to +150C Lead temperature 1.6 mm (1/16 inch) from case for 10 seconds +260C 1.4 Recommended operating conditions. Supply voltage range (VCC) . +3 V to +3.
11、6 V High-level input voltage (Enables) (VIH) +2 V to +5 V Low-level input voltage (Enables) (VIL) 0 V to +0.8 V Magnitude of differential input voltage (|VID|): Device type 01 +0.1 V to +3 V Device type 02 0.8 V maximum Voltage at any bus terminal (separately or common-mode) (VIor VIC) -4 V to +5 V
12、Operating free-air temperature range (TA) -55C to +125C _ 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “re
13、commended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. 2/ All voltage values, except differential I/O bus voltages, are with respect to network ground terminal. 3/ Tested in accordance with JEDEC Standard 22,
14、Test Method A114 (JESD 22-A114). 4/ Tested in accordance with JEDEC Standard 22, Test Method C101 (JESD 22-C101). 5/ This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. Provided by IHSNot for ResaleNo reproduction or networking permitted without
15、 license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05614 REV B PAGE 4 2. APPLICABLE DOCUMENTS JEDEC SOLID STATE TECHNOLOGY ASSOCIATION (JEDEC) JEP95 Registered and Standard Outlines for Semiconductor Devices JESD 22-A114 Electrostatic Dischar
16、ge (ESD) Sensitivity Testing Human Body Model (HBM) JESD 22-C101 Field-Induced Charged-Device Model Test Method for Electrostatic-Discharge-Withstand Thresholds of Microelectronic Components (Copies of these documents are available online at http:/www.jedec.org or from JEDEC Solid State Technology A
17、ssociation, 3103 North 10th Street, Suite 240S, Arlington, VA 22201-2107). 3. REQUIREMENTS 3.1 Marking. Parts shall be permanently and legibly marked with the manufacturers part number as shown in 6.3 herein and as follows: A. Manufacturers name, CAGE code, or logo B. Pin 1 identifier C. ESDS identi
18、fication (optional) 3.2 Unit container. The unit container shall be marked with the manufacturers part number and with items A and C (if applicable) above. 3.3 Electrical characteristics. The maximum and recommended operating conditions and electrical performance characteristics are as specified in
19、1.3, 1.4, and table I herein. 3.4 Design, construction, and physical dimension. The design, construction, and physical dimensions are as specified herein. 3.5 Diagrams. 3.5.1 Case outlines. The case outlines shall be as shown in 1.2.2 and figure 1. 3.5.2 Logic diagram and function table. The logic d
20、iagram and function table shall be as shown in figure 2. 3.5.3 Terminal connections. The terminal connections shall be as shown in figure 3. 3.5.4 Switching waveforms and test circuits. The switching waveforms and test circuits shall be as shown in figures 4a 4f. Provided by IHSNot for ResaleNo repr
21、oduction or networking permitted without license from IHS-,-,-DEFENSE SUPPLY CENTER, COLUMBUS COLUMBUS, OHIO SIZE A CODE IDENT NO. 16236 DWG NO. V62/05614 REV B PAGE 5 TABLE I. Electrical performance characteristics. 1/ Test Symbol Test conditions unless otherwise specified Device type Limits Unit M
22、in Typ Max Electrical Characteristics 2/ Positive-going differential input voltage threshold VIT1VIB = -4 V or 5 V See figures 4a and 4b. All 50 mV Negative-going differential input voltage threshold VIT2-50 mV Differential input failsafe voltage threshold VIT3See figures 4a and 4e. -32 -100 mW Diff
23、erential input voltage hysteresis, VIT1 VIT2VID(HYS)50 mV High-level output voltage VOHIOH= -4 mA 2.4 V Low-level output voltage VOLIOL= 4 mA 0.4 V Supply current ICCG at VCC, No load, Steady state All 16 25 mA G at GND 1.1 6 Input current (A or B inputs) IIVI= 0 V, Other input open. 01 25 A VI= 2.4
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