JEDEC JESD91A-2003 Method for Developing Acceleration Models for Electronic Component Failure Mechanisms《为电子部件故障设备发展加速度模型的方法》.pdf

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1、JEDEC STANDARD Method for Developing Acceleration Models for Electronic Component Failure Mechanisms JESD91A (Revision of JESD91) AUGUST 2003, Reaffirmed: JANUARY 2011 JEDEC SOLID STATE TECHNOLOGY ASSOCIATION NOTICE JEDEC standards and publications contain material that has been prepared, reviewed,

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10、ive contact information. JEDEC Standard No. 91A -i- METHOD FOR DEVELOPING ACCELERATION MODELS FOR ELECTRONIC COMPONENT FAILURE MECHANISMS Introduction The electronics industry often conducts testing at accelerated conditions to predict failure mechanism behavior at customer use conditions. As a cons

11、equence, the development of acceleration models for individual failure mechanisms in electronic components has become a crucial element in defining appropriate accelerated stress conditions and sequences for known mechanisms and establishing their rate of occurrence, with the goal of accurately pred

12、icting customer field performance. Failure mechanisms generally fall into two broad categories: defect-based mechanisms, which typically exhibit a decreasing failure rate and usually affect a small fraction of the product population throughout field use; and wear-out mechanisms, which produce an inc

13、reasing failure rate and generally involve a substantial portion of the product population. JEDEC Standard No. 91A -ii- JEDEC Standard No. 91A Page 1 METHOD FOR DEVELOPING ACCELERATION MODELS FOR ELECTRONIC COMPONENT FAILURE MECHANISMS (From JEDEC Board Ballot JCB-01-99, and JCB-03-39 formulated und

14、er the cognizance of the JC-14.3 Subcommittee on Silicon Devices Reliability Qualification and Monitoring.) 1 Scope The method described in this document applies to all reliability mechanisms associated with electronic components. The purpose of this standard is to provide a reference for developing

15、 acceleration models for defect-related and wear-out mechanisms in electronic components. 2 Terms and definitions For the purposes of this standard, the following terms and definitions apply. acceleration factor (A): For a given failure mechanism, the ratio of the time it takes for a certain fractio

16、n of the population to fail, following application of one stress or use condition, to the corresponding time at a more severe stress or use condition. NOTE Times are generally derived from modeled time-to-fail distributions (lognormal, Weibull, exponential, etc.). activation energy (EA): The excess

17、free energy over the ground state that must be acquired by an atomic or molecular system in order that a particular process can occur. apparent activation energy (Eaa): An equivalent activation energy on the basis of which the time-to-failure distribution of a complex structure, e.g., a transistor o

18、r integrated circuit, can be estimated. Apparent activation energy refers to the apparent shift in the time-to-failure distribution of some product as a function of temperature. The apparent activation energy is associated with a distribution of the time to failure for a given mechanism. The summati

19、on of the actual physical processes, with various possible thermal activation energies to create the mechanism, is reflected in the distribution. JEDEC Standard No. 91A Page 2 2 Terms and definitions (contd) Arrhenius equation: A mathematical expression applicable to most thermal accelerations for s

20、emiconductor device failure mechanisms: AT= exp(-Eaa/k)(1/Tt- 1/ Ts) where AT is the acceleration factor due to changes in temperature; Eaais the apparent activation energy (eV); k is Boltzmanns constant (8.62 x 10 -5eV/K); Ttis the absolute temperature of the test (K); Tsis the absolute temperature

21、 of the system (K). bathtub curve: A plot of failure rate versus time that exhibits three phases of life: infant mortality (initially decreasing failure rate with time), intrinsic or useful life (relatively constant failure rate), and wear-out (increasing failure rate). failure mechanism: The physic

22、al, chemical, electrical, or other process that has led to a nonconformance. (See JESD671, “Component Quality Problem Analysis and Corrective Action Requirements”.) failure mode: The way in which a failure mechanism manifests itself in a failing component. failure cause: The physical process that cr

23、eated the failure mechanism. failure rate (): The fraction of a population that fails within a specified interval, divided by that interval. Standard methods of reporting failure rates for semiconductor devices include 1) percent failed per 1000 hours and 2) FITs. FITs: Failures in Time. FITs design

24、ates the number of failures per 109device-hours. process lot: A batch of material processed in a given time interval through the same or similar equipment. random defect: A defect found in a failing device that does not occur in a manner consistent with normal process variation. It is not a normal p

25、art of the intrinsic population of a production run. The failure rate is attributed to defects during production. systematic defect: A defect found in a failing electronic component that is attributed to process variation, such as a metal contact open due to a photomask problem. JEDEC Standard No. 9

26、1A Page 3 3 References JEP122, Failure Mechanisms and Models for Silicon Semiconductor Devices JESD47, Stress Test-Driven Qualification of Integrated Circuits JESD74, Early Life Failure Rate Calculation Procedure for Electronic Components JESD85, Calculation of Failure Rates in Units of FITs 4 Desig

27、n of acceleration model experiments 4.1 Defining accelerated test conditions For a known or suspected failure mechanism, it is important to identify all stimuli affecting the mechanism based on anticipated application conditions and material capabilities. Typical stimuli may include temperature, ele

28、ctric field, humidity, thermomechanical stresses, vibration, and corrosive environments. The choice of accelerated test conditions must be based on material properties and application requirements. There is a recognized industry need to conduct accelerated tests over a reasonable time interval. Acce

29、lerated stressing must be weighed against generating fails that are not pertinent to the experiment, including those due to stress equipment or materials problems, or “false failures” caused by product overstress conditions that will never occur during actual product use. Once specific conditions ar

30、e defined, a matrix of accelerated tests embodying these stimuli must be developed that allow separate modeling of each individual stimulus. A minimum of two accelerated test cells is required for each identified stimulus; three or more are preferred. Several iterations may be required in cases wher

31、e some stimuli produce only secondary effects. For instance, high temperature storage and thermal cycle stressing may yield similar failures, where high temperature storage alone is the root stimulus. JEDEC Standard No. 91A Page 4 4 Design of acceleration model experiments (contd) 4.2 Establishing f

32、ailure statistics Accelerated test samples must be drawn from a population comprising three or more process lots and representing the range of product attributes that can affect the occurrence of the failure mechanism, whether defect or wear-out. For example, samples for a thin dielectric integrity

33、modeling evaluation must include the full range of dielectric thickness expected in production. One lot minimum, for preliminary work using test structures to study specific wearout mechanisms, is allowed. Test conditions for a wear-out mechanism must be defined to produce failures in over 50% of th

34、e samples at each condition, and testing must continue until these results are achieved. This is required to determine the existence of bimodality and determine the shape of the distribution. Defect-related mechanisms, whether due to random or systematic defects, require a different statistical appr

35、oach. For these mechanisms, accelerated test conditions and sample sizes should be selected to generate ten or more fails per condition. This assumes a unimodal fail distribution. A lower sample size may be used with justification (e.g., high costs, limited sample supply), but may compromise model a

36、ccuracy. 4.3 Selecting test time intervals To establish a relevant failure distribution with time for a given failure mechanism, the test intervals must be selected to allow for an accurate mathematical representation of the failures through the entire stress period. A defect-related mechanism, whic

37、h produces a decreasing failure rate, will require critical early test readouts compared to a wear-out distribution, where failures may not appear until well into the stress at a specific condition. Equipment costs, program schedules, and other factors tend to limit accelerated test duration to a fe

38、w months. A minimum of four test intervals must be defined for each test condition over the allotted stress period. Since most failure mechanisms exhibit a logarithmic relationship in time, test readouts should be spaced at logarithmic intervals. In the case of a wear-out mechanism, the midrange int

39、ervals should coincide with a projected 50% failure point. For defect mechanisms, early readouts should be taken which produce less than one-third of the failures expected throughout the entire stress period. JEDEC Standard No. 91A Page 5 4 Design of acceleration model experiments (contd) 4.4 Defini

40、ng failure criteria For modeling purposes, the definition of a failure depends on the failure mechanism under evaluation and the test vehicle being used. If a product is used as a vehicle in its final form (e.g., a potentially saleable packaged device), a failure is a component that does not meet al

41、l the final manufacturing test specifications. If a test vehicle with structures representing a certain technology or design element is used, such as a metal pattern for electromigration or an FET gate chain to study thin dielectric breakdown, a failure is based on the mechanism related to the test

42、structure, and ultimately to product. The electromigration structure typically fails when it exceeds a specific electrical resistance value; the gate chain is classified a failure if its resistance falls below a certain value. Failure criteria for modeling must be uniformly applied to all test sampl

43、es at defined accelerated test conditions, and for every readout interval. 5 Analysis of accelerated test data 5.1 Choosing failure distributions Once the modeling experiment has been defined and executed, the failure distribution that best approximates the rate of observed fails with time from the

44、accelerated test data should be selected. The lognormal and Weibull distributions are most often used to represent reliability failure mechanisms for electronic components. The exponential distribution, which produces a constant failure rate, is a special case of the Weibull distribution. A descript

45、ion of these mathematical distributions can be found in JEP122. Fitting the observed data to the proper failure distribution will produce the shape parameters for that distribution, (i.e., lognormal , Weibull or m, etc.). A regression technique with maximum likelihood estimates should be used that f

46、orces all failure distributions for a given stimulus to the same shape parameter, e.g., arious temperatures. The correlation coefficient from the regression analysis should be at least 90%. Since these techniques may place undue emphasis on the last time interval readout, adjustments should be made

47、when the curve fit appears to be in significant conflict with the overall failure distribution. 5.2 Deriving/Using acceleration factors Acceleration factors can be easily obtained from the above failure distributions by calculating the ratio of failure times from the distribution line at one conditi

48、on to the same fraction failing on the distribution line corresponding to another condition. JEDEC Standard No. 91A Page 6 5 Analysis of accelerated test data (contd) 5.2 Deriving/Using acceleration factors (contd) A mathematical relationship can be developed that describes acceleration as a functio

49、n of varied conditions for a given stimulus, and that can be extended to the full range of anticipated component use conditions. A classic example of such a relationship is the development of an apparent activation energy using the Arrhenius equation. Three informative examples are included in the Annexes which follow: Annex A describes the derivation of Arrhenius temperature acceleration factors for an aluminum/copper wire bond wear-out mechanism; Annex B summarizes temperature and current density acceleration factors for metal lines and vias in a new technology, and Ann