EN 60191-6-18-2010 en Mechanical standardization of semiconductor devices - Part 6-18 General rules for the preparation of outline drawings of surface mounted semiconductor device .pdf
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1、raising standards worldwideNO COPYING WITHOUT BSI PERMISSION EXCEPT AS PERMITTED BY COPYRIGHT LAWBSI Standards PublicationMechanical standardization ofsemiconductor devicesPart 6-18: General rules for the preparation of outlinedrawings of surface mounted semiconductor devicepackages Design guide for
2、 ball grid array (BGA)BS EN 60191-6-18:2010Incorporating corrigendum 2010May National forewordThis British Standard is the UK implementation of EN 60191-6-18:2010. It isidentical to IEC 60191-6-18:2010,The UK participation in its preparation was entrusted to Technical CommitteeEPL/47, Semiconductors
3、.A list of organizations represented on this committee can be obtained onrequest to its secretary.This publication does not purport to include all the necessary provisions of acontract. Users are responsible for its correct application. BSI 2010 ISBN 978 0 580 71947 9 ICS 31.080.01Compliance with a
4、British Standard cannot confer immunity from legal obligations.This British Standard was published under the authority of the Standards Policy and Strategy Committee on 30 April 2010.Date Text affectedBRITISH STANDARDBS EN 60191-6-18:2010corrigendum incorporating The start and finish of introduced o
5、r altered by corrigendum is indicatedin the by tags. is indicatedaltered by in.the by tagsAmendments/corrigenda issued since publication31 October 2010textImplementation of IEC corrigendum May 2010IEC corrigendum May 2010texttext TextMay 2010.EUROPEAN STANDARD EN 60191-6-18 NORME EUROPENNE EUROPISCH
6、E NORM February 2010 CENELEC European Committee for Electrotechnical Standardization Comit Europen de Normalisation Electrotechnique Europisches Komitee fr Elektrotechnische Normung Central Secretariat: Avenue Marnix 17, B - 1000 Brussels 2010 CENELEC - All rights of exploitation in any form and by
7、any means reserved worldwide for CENELEC members. Ref. No. EN 60191-6-18:2010 E ICS 31.080.01 English version Mechanical standardization of semiconductor devices - Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages - Design guide for bal
8、l grid array (BGA) (IEC 60191-6-18:2010) Normalisation mcanique des dispositifs semiconducteurs - Partie 6-18: Rgles gnrales pour la prparation des dessins dencombrement des dispositifs semiconducteurs pour montage en surface - Guide de conception pour les botiers matriciels billes (BGA) (CEI 60191-
9、6-18:2010) Mechanische Normung von Halbleiterbauelementen - Teil 6-18: Allgemeine Regeln fr die Erstellung von Gehusezeichnungen von SMD-Halbleitergehusen - Konstruktionsleitfaden fr Ball-Grid-Array (BGA) (IEC 60191-6-18:2010) This European Standard was approved by CENELEC on 2010-02-01. CENELEC mem
10、bers are bound to comply with the CEN/CENELEC Internal Regulations which stipulate the conditions for giving this European Standard the status of a national standard without any alteration. Up-to-date lists and bibliographical references concerning such national standards may be obtained on applicat
11、ion to the Central Secretariat or to any CENELEC member. This European Standard exists in three official versions (English, French, German). A version in any other language made by translation under the responsibility of a CENELEC member into its own language and notified to the Central Secretariat
12、has the same status as the official versions. CENELEC members are the national electrotechnical committees of Austria, Belgium, Bulgaria, Croatia, Cyprus, the Czech Republic, Denmark, Estonia, Finland, France, Germany, Greece, Hungary, Iceland, Ireland, Italy, Latvia, Lithuania, Luxembourg, Malta, t
13、he Netherlands, Norway, Poland, Portugal, Romania, Slovakia, Slovenia, Spain, Sweden, Switzerland and the United Kingdom. - 2 - Foreword The text of document 47D/753A/FDIS, future edition 1 of IEC 60191-6-18, prepared by SC 47D, Mechanical standardization for semiconductor devices, of IEC TC 47, Sem
14、iconductor devices, was submitted to the IEC-CENELEC parallel vote and was approved by CENELEC as EN 60191-6-18 on 2010-02-01. Attention is drawn to the possibility that some of the elements of this document may be the subject of patent rights. CEN and CENELEC shall not be held responsible for ident
15、ifying any or all such patent rights. The following dates were fixed: latest date by which the EN has to be implemented at national level by publication of an identical national standard or by endorsement (dop) 2010-11-01 latest date by which the national standards conflicting with the EN have to be
16、 withdrawn (dow) 2013-02-01 Annex ZA has been added by CENELEC. _ Endorsement notice The text of the International Standard IEC 60191-9-18:2010 was approved by CENELEC as a European Standard without any modification. In the official version, for Bibliography, the following notes have to be added for
17、 the standards indicated: IEC 60191-6-2 NOTE Harmonized as EN 60191-6-2. IEC 60191-6-4 NOTE Harmonized as EN 60191-6-4. IEC 60191-6-5 NOTE Harmonized as EN 60191-6-5. _ BS EN 60191-6-18:2010EN 60191-6-18:2010 (E)- 3 - Annex ZA (normative) Normative references to international publications with their
18、 corresponding European publications The following referenced documents are indispensable for the application of this document. For dated references, only the edition cited applies. For undated references, the latest edition of the referenced document (including any amendments) applies. NOTE When an
19、 international publication has been modified by common modifications, indicated by (mod), the relevant EN/HD applies. Publication Year Title EN/HD Year IEC 60191-6 - Mechanical standardization of semiconductor devices - Part 6: General rules for the preparation of outline drawings of surface mounted
20、 semiconductor device packages EN 60191-6 - BS EN 60191-6-18:2010EN 60191-6-18:2010 (E) 4 CONTENTS 1 Scope.5 2 Normative references .5 3 Terms and definitions .5 4 Terminal position numbering.6 5 Nominal package dimension .6 6 Symbols and drawings7 7 Dimensions 10 8 Recommended BGA variations .16 Bi
21、bliography20 Figure 1 Cavity down type7 Figure 2 Cavity up type 8 Figure 3 Pattern of terminal position areas.9 Figure 4 Example of the terminal depopulations.15 Table 1 Group 1: Dimensions appropriate to mounting and interchangeability10 Table 2 Group 2: Dimensions appropriate to mounting and gaugi
22、ng.13 Table 3 Combinations of D, E, e, MD, ME, and n 14 Table 4 P-BGA (Cavity up) 1,27 mm pitch16 Table 5 P-BGA (Cavity up) 1,0 mm pitch16 Table 6 P-BGA (Cavity down) 1,27 mm pitch18 Table 7 T-BGA 1,27 mm pitch 18 Table 8 T-BGA 1,0 mm pitch19 Table 9 P-BGA and C-BGA (Flip-chip interconnection) 1,0 m
23、m pitch.19 BS EN 60191-6-18:2010EN 60191-6-18:2010 (E) 5 MECHANICAL STANDARDIZATION OF SEMICONDUCTOR DEVICES Part 6-18: General rules for the preparation of outline drawings of surface mounted semiconductor device packages Design guide for ball grid array (BGA) 1 Scope This part of IEC 60191 provide
24、s standard outline drawings, dimensions, and recommended variations for all square ball grid array packages (BGA), whose terminal pitch is 1 mm or larger. 2 Normative references The following referenced documents are indispensable for the application of this document. For dated references, only the
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