DLA SMD-5962-95552 REV D-2003 MICROCIRCUIT LINEAR ADVANCED RAIL-TO-RAIL DUAL OPERATIONAL AMPLIFIER MONOLITHIC SILICON《先进的杆对杆双运算放大器硅单片电路线型微电路》.pdf

《DLA SMD-5962-95552 REV D-2003 MICROCIRCUIT LINEAR ADVANCED RAIL-TO-RAIL DUAL OPERATIONAL AMPLIFIER MONOLITHIC SILICON《先进的杆对杆双运算放大器硅单片电路线型微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-95552 REV D-2003 MICROCIRCUIT LINEAR ADVANCED RAIL-TO-RAIL DUAL OPERATIONAL AMPLIFIER MONOLITHIC SILICON《先进的杆对杆双运算放大器硅单片电路线型微电路》.pdf（13页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with N.O.R. 5962-R017-96. 96-01-10 M. A. FRYE B Add device type 02. Editorial and technical changes throughout. 96-02-06 M. A. FRYE C Make changes to IIOand IIBtests as specified under table I. - ro 00-09-20 R. MONNIN D Draw

2、ing updated to reflect current requirements. gt 03-05-21 R. MONNIN REV SHET REV SHET REV STATUS REV D D D D D D D D D D D D OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY MARCIA B. KELLEHER DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY RAJESH PITHADIA COLUM

3、BUS, OHIO 43216 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY MICHAEL A. FRYE AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-12-27 MICROCIRCUIT, LINEAR, ADVANCED RAIL-TO-RAIL DUAL OPERATIONAL AMPLIFIER, MONOLITHIC SILICON AMSC N/A REVISIO

4、N LEVEL D SIZE A CAGE CODE 67268 5962-95552 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962-E163-03 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWIN

5、G SIZE A 5962-95552 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL D SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents three product assurance class levels consisting of space application (device class V), high reliability (device classes M and Q), and

6、 nontraditional performance environment (device class N). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. For device class N, the user

7、is cautioned to assure that the device is appropriate for the application environment. 1.2 PIN. The PIN is as shown in the following example: 5962 - 95552 01 N X X Federal stock class designator RHA designator (see 1.2.1) Devicetype (see 1.2.2) Deviceclass designator Case outline (see 1.2.4) Lead fi

8、nish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes N, Q, and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA level

9、s and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 TLC2272M Advanced rail-to-rail dual operational amplifiers 02 TLC2272AM Advan

10、ced rail-to-rail dual operational amplifiers with enhanced VIO1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-8

11、83 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A N Certification and qualification to MIL-PRF-38535 with a nontraditional performance environment (encapsulated in plastic) Q or V Certification and qualification to MIL-PRF-38535 Provided by IHSNot for Res

12、aleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95552 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL D SHEET 3 DSCC FORM 2234 APR 97 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835

13、, JEDEC Publication 95 and as follows: Outline letter Descriptive designator Terminals Package style Document X MS-0012 AA 8 Plastic small outline JEDEC Publication 95 H GDFP1-F10 or CDFP2-F10 10 Flat pack MIL-STD-1835 P GDIP1-T8 or CDIP2-T8 8 Dual-in-line MIL-STD-1835 2 CQCC1-N20 20 Square leadless

14、 chip MIL-STD-1835 carrier 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes N, Q, and V or MIL-PRF-38535, appendix A for device class M. 1.2.6 Device class N manufacturer PIN. For Device class N, plastic encapsulated microcircuits (PEMS) the following manufactur

15、er PIN (see 3.5.1 herein) shall be marked: Standard 1/ microcircuit drawing PIN Manufacturer PIN 5962-9555201NXD 2272M 1.3 Absolute maximum ratings. 2/ Supply voltage (+VDD) +8 V dc 3/ Supply voltage (-VDD) .-8 V dc Differential input voltage (VID) 16 V dc 4/ Input voltage (VI) 8 V dc 3/ Input curre

16、nt (II) 5 mA Output current (IO) 50 mA Total current into +VDD.50 mA Total current out of VDD.50 mA Duration of short-circuit ( 25C) Unlimited 5/ Continuous total power dissipation (PD) ( 25C): 6/ Case H 675 mW Case P .1050 mW Case X 725 mW Case 2 .1375 mW Storage temperature range -65C to +150C Lea

17、d temperature (soldering, 10 seconds) .+260C Thermal resistance, junction-to-case (JC): Cases H, P, and 2 .See MIL-STD-1835 Case X See JEDEC Publication 95 1/ The SMD is provided for cross reference information, see 3.5.1 herein. 2/ Stresses above the absolute maximum rating may cause permanent dama

18、ge to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 3/ All voltage values except differential voltages are with respect to the midpoint between +VDDand VDD. 4/ Differential voltages are at the non-inverting with respect to the inverting input. E

19、xcessive current will flow if input is brought below VDD 0.3 V. 5/ The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded. 6/ Above +25C, derate at a factor of 5.8mW/C for case X, 8.4mW/C for case P

20、, 5.4 mW/C for case H and 11 mW/C for case 2. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95552 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL D SHEET 4 DSCC FORM 2234 APR 97 1.4

21、Recommended operating conditions. Supply voltage (VDD) 2.2 V dc minimum to 8 V dc maximum Input voltage range (VI) -VDDminimum to +VDD 1.5 V dc maximum Common mode input voltage (VIC) .-VDDminimum to +VDD 1.5 V dc maximum Operating free-air temperature (TA) .-55C minimum to +125C maximum 2. APPLICAB

22、LE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the issue of the Department of Defense

23、Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the solicitation. SPECIFICATION DEPARTMENT OF DEFENSE MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. STANDARDS DEPARTMENT OF DEFENSE MIL-STD-883 - Test Method Standard Microcircuits. MIL-S

24、TD-1835 - Interface Standard Electronic Component Case Outlines. HANDBOOKS DEPARTMENT OF DEFENSE MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Unless otherwise indicated, copies of the specification, standards, and handbooks are available from

25、 the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless otherwise specified, the issues of the documents which are DoD adopted

26、 are those listed in the issue of the DODISS cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of the documents cited in the solicitation. ELECTRONICS INDUSTRIES ALLIANCE (EIA) JEDEC Publication 95 - Registered and Standard Outline

27、s for Semiconductor Devices. (Applications for copies should be address to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201-3834). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

28、5962-95552 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL D SHEET 5 DSCC FORM 2234 APR 97 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document

29、, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes N, Q, and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device m

30、anufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified her

31、ein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes N, Q, and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline(s). The case outline(s) shall be i

32、n accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.3 Electrical performance characteristics and post irradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and post irradiation

33、 parameter limits are as specified in table I and shall apply over the full ambient operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking

34、. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“

35、on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes N, Q, and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The cer

36、tification mark for device classes N, Q, and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes N, Q, and V, a certificate of compliance shall be req

37、uired from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The ce

38、rtificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes N, Q, and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, app

39、endix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes N, Q, and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for d

40、evice class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and t

41、he acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this draw

42、ing shall be in microcircuit group number 49 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95552 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL D SH

43、EET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device type Limits Unit 1/ Min Max Input offset voltage VIOVDD/ VDD= 2.5 V, 1 01 2500 V VIC= 0 V, VOUT= 0 V, RS= 50 2,3 3000 VDD/ VDD= 5 V, 1

44、 2500 VIC= 0 V, VOUT= 0 V, RS= 50 2,3 3000 VDD/ VDD= 2.5 V, 1 02 950 VIC= 0 V, VOUT= 0 V, RS= 50 2,3 1500 VDD/ VDD= 5 V, 1 950 VIC= 0 V, VOUT= 0 V, RS= 50 2,3 1500 Input offset current IIOVDD/ VDD= 2.5 V, VIC= 0 V, VOUT= 0 V, RS= 50 , TA= +125C 2 All 800 pA VDD/ VDD= 5 V, VIC= 0 V, VOUT= 0 V, RS= 50

45、 , TA= +125C 800 Input bias current IIBVDD/ VDD= 2.5 V, VIC= 0 V, VOUT= 0 V, RS= 50 , TA= +125C 2 All 800 pA VDD/ VDD= 5 V, VIC= 0 V, VOUT= 0 V, RS= 50 , TA= +125C 800 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STA

46、NDARD MICROCIRCUIT DRAWING SIZE A 5962-95552 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43216-5000 REVISION LEVEL D SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TA +125C unless otherwise specified Group A subgroups Device typ

47、e Limits Unit 1/ Min Max Common mode input voltage range VICRVDD/ VDD= 5 V, 1 All 0 to 4 V RS= 50 , |VIO| 5 mV 2,3 0 to 3.5 VDD/ VDD= 5 V, 1 -5 to 4 RS= 50 , |VIO| 5 mV 2,3 -5 to 3.5 High level output voltage VOHVDD/ VDD= 5 V, IOH= -200 A 1,2,3 All 4.85 V VDD/ VDD= 5 V, IOH= -1 mA 4.25 Low level out

48、put voltage VOLVDD/ VDD= 5 V, IOL= 500 A, VIC= 2.5 V 1,2,3 All 0.15 V VDD/ VDD= 5 V, IOL= 5 mA, VIC= 2.5 V 1.5 Maximum positive peak output voltage +VOMVDD/ VDD= 5 V, IO= -200 A 1,2,3 All 4.85 V VDD/ VDD= 5 V, IO= -1 mA 4.25 Maximum negative peak output voltage -VOMVDD/ VDD= 5 V, IO= 500 A, VIC= 0 V 1,2,3 All -4.85 V VDD/ VDD= 5 V, IO= 5 mA, VIC= 0 V -3.5 Large signal differential voltage amplification AVDVDD/ VDD= 5 V, VOUT= 1 V to 4 V, RL= 10 k referenced to 2.5 V, VIC= 2.5 V 1,2,3 All 10 V/mV VDD/ VDD= 5 V, VOUT= 4 V, RL= 10 k