DLA SMD-5962-94696 REV B-2005 MICROCIRCUIT DIGITAL ECL LOW SKEW QUAD CLOCK DRIVER MONOLITHIC SILICON《数字的低歪斜的时钟驱动器硅单片电路线型微电路》.pdf

《DLA SMD-5962-94696 REV B-2005 MICROCIRCUIT DIGITAL ECL LOW SKEW QUAD CLOCK DRIVER MONOLITHIC SILICON《数字的低歪斜的时钟驱动器硅单片电路线型微电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-94696 REV B-2005 MICROCIRCUIT DIGITAL ECL LOW SKEW QUAD CLOCK DRIVER MONOLITHIC SILICON《数字的低歪斜的时钟驱动器硅单片电路线型微电路》.pdf（14页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with NOR 5962-R239-94. 94-07-13 MONICA L. POELKING B Drawing updated to reflect current requirements. -rrp 05-02-09 RAYMOND MONNIN REV SHET REV SHET REV STATUS REV B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9

2、10 11 12 13 PMIC N/A PREPARED BY LARRY T. GAUDER DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY THOMAS M. HESS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY MONICA L. POELKING MICROCIRCUIT, DIGITAL, ECL, LOW

3、 SKEW QUAD CLOCK DRIVER, MONOLITHIC SILICON AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 94-06-06 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-94696 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E124-05 Provided by IHSNot for ResaleNo reproduction or networking permitted witho

4、ut license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes

5、 Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN is as shown in the f

6、ollowing example: 5962 - 94696 01 M F A Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL

7、-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device ty

8、pe(s) identify the circuit function as follows: Device type Generic number Circuit function 01 100315 Low skew quad clock driver 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements document

9、ation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and a

10、s follows: Outline letter Descriptive designator Terminals Package style F GDFP2-F16 or CDFP3-F16 16 Flat package 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproducti

11、on or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Negative supply voltage range (VEE) . -7.0 V dc to +0.5 V d

12、c DC input voltage range (VIN) . VEEto +0.5 V Maximum dc output current (IOUT) . -50 mA Storage temperature range . -65C to +150C Lead temperature (soldering, 10 seconds). +300C Junction temperature (TJ) . +175C Maximum power dissipation (PD) 500 mW Thermal resistance, junction-to-case (JC) . See MI

13、L-STD-1835 1.4 Recommended operating conditions. Negative supply voltage range (VEE) -5.7 V dc minimum to -4.2 V dc maximum High level input voltage range (VIH) -1165 mV dc minimum to -870 mV dc maximum Low level input voltage range (VIL) . -1830 mV dc minimum to -1475 mV dc maximum Case operating t

14、emperature range (TC) . -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those

15、cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outl

16、ines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Orde

17、r Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or netw

18、orking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the reference

19、s cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accor

20、dance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with M

21、IL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herei

22、n for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram sh

23、all be as specified on figure 3. 3.2.5 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance char

24、acteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are def

25、ined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-

26、“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certi

27、fication mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from

28、 a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate

29、of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and he

30、rein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For

31、 device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the

32、 option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit gro

33、up number 33 (see MIL-PRF-38535, appendix A). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABL

34、E I. Electrical performance characteristics. Test Symbol Conditions -55C TC +125C -5.7 V VEE -4.2 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max 1, 2 -1025 -870 High level output voltage VOHVEE= -4.2 V, -5.7 V VIH= -0.87 V VIL= -1.83 V Loading 50 to -2.0 V 3 01 -1085

35、-870 mV 1, 2 -1830 -1620 Low level output voltage VOLVEE= -4.2 V, -5.7 V VIH= -0.87 V VIL= -1.83 V Loading 50 to -2.0 V 3 01 -1830 -1555 mV 1, 2 -1035 High level threshold output voltage VOHCVEE= -4.2 V, -5.7 V VIH= -1.165 V VIL= -1.475 V Loading 50 to -2.0 V 3 01 -1085 mV 1, 2 -1610 Low level thres

36、hold output voltage VOLCVEE= -4.2 V, -5.7 V VIH= -1.165 V VIL= -1.475 V Loading 50 to -2.0 V 3 01 -1555 mV Negative power supply drain current IEEVEE= -5.7 V, -4.2 V 1, 2, 3 01 -80 -25 mA Common mode voltage VCMVEE= -4.2 V, -5.7 V 1, 2, 3 01 -2000 -500 mV Input low current IIILVEE= -4.2 V, VM= 1.83

37、V 1, 2, 3 01 0.5 A Input leakage current ICBOVEE= -4.2 V, VM= -4.2 V 1, 2, 3 01 -10 A Input voltage differential VDIFFVEE= -4.2 V, -5.7 V VIN= -1.83 V 1, 2, 3 01 150 mV 1, 2 100 VEE= -5.7 V, VM= -0.87 V CLKIN CLKIN 3 150 1, 2 300 VEE= -5.7 V, VM= -0.87 V TCLK 3 450 1, 2 260 High level input current

38、IIHVEE= -5.7 V, VM= -0.87 V CLKSEL 3 01 380 A Functional tests VEE= -4.2 V, -5.7 V VIH= -1165 V,VIL= -1830 V See 4.4.1b 7, 8 01 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-9

39、4696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Conditions -55C TC +125C -5.7 V VEE -4.2 V unless otherwise specified Group A subgroups Device type Limits Unit Min Max

40、9 0.63 0.88 10 0.72 1.02 Propagation delay time, CLKIN to CLKINNtPLH1tPHL1VEE= -4.2 V to -5.7 V 11 01 0.58 0.88 ns 9 0.30 1.50 10 0.40 1.70 Propagation delay time, TCLK to CLKntPLH2tPHL2VEE= -4.2 V to -5.7 V 11 01 0.30 1.60 ns 9 0.40 1.70 10 0.50 1.80 Propagation delay time, CLKSEL to CLKntPLH3tPHL3

41、VEE= -4.2 V to -5.7 V 11 01 0.40 1.80 ns 9 100 Gate to gate skew tSVEE= -4.2 V to -5.7 V 10, 11 01 120 ps 9 0.25 0.85 10 0.20 0.85 Transition time, CLKn1/ tTLHtTHLVEE= -4.2 V to -5.7 V 11 01 0.30 0.90 ns 1/ This parameter is provided as design information only (not tested but guaranteed). Provided b

42、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 Device type 01 Case outline F Terminal number Terminal symbo

43、l 1 CLKIN 2 VEE3 CLK1 4 CLK1 5 CLK2 6 CLK2 7 VCCA8 TCLK 9 CLKSEL 10 VCC11 CLK3 12 CLK3 13 CLK4 14 CLK4 15 VEE16 CLKIN FIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94696 DEFE

44、NSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 CLKSEL CLKIN CLKIN TCLK CLKNNCLK L L H X L H L H L X H L H X X L L H H X X H H L L = Low voltage level. H = High voltage level. X = Irrelevant FIGURE 2. Truth table. FIGURE 3. Logic diagram.Provided b

45、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 NOTES: 1. Shown for testing CLKIN to CLK1 in the differentia

46、l mode. 2. L1, L2, L3, and L4 = equal length 50 impedance lines. 3. All unused inputs and outputs are loaded with 50 9n parallel with pF to GND. 4. Scope should have 50 input terminator internally. FIGURE 4. Test circuit and switching waveforms. Provided by IHSNot for ResaleNo reproduction or networ

47、king permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 10 DSCC FORM 2234 APR 97 NOTE: 1. The output to output skew, which is defined as the difference in the propagation delays betwee

48、n each of the four outputs on any one device shall not exceed 75 ps. FIGURE 4. Test circuit and switching waveforms Continued. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-94696 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures sh