DLA SMD-5962-94634-1995 MICROCIRCUIT MEMORY DIGITAL CMOS 8000 GATE CONFIGURABLE LOGIC ARRAY MONOLITHIC SILICON《硅单片 8000栅可配置逻辑阵列 数字记忆微型电路》.pdf

《DLA SMD-5962-94634-1995 MICROCIRCUIT MEMORY DIGITAL CMOS 8000 GATE CONFIGURABLE LOGIC ARRAY MONOLITHIC SILICON《硅单片 8000栅可配置逻辑阵列 数字记忆微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-94634-1995 MICROCIRCUIT MEMORY DIGITAL CMOS 8000 GATE CONFIGURABLE LOGIC ARRAY MONOLITHIC SILICON《硅单片 8000栅可配置逻辑阵列 数字记忆微型电路》.pdf（23页珍藏版）》请在麦多课文档分享上搜索。

1、SMD-5962-94634 9999996 0078732 359 DESCRIPTION REVIS IONS I I LTR I DATE (YR-MO-DA) I APPROVED =-ti+ SHEET REV III SHEET REV STATUS OF SHEETS PMIC NIA STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE AMSC N/A *=+TtT+T SHEET

2、PREPARED BY KENNETH RICE CHECKED BY JEFF BOWLING APPROVED BY MICHAEL FRYE DRAWING APPROVAL DATE 95 - 06- 23 REVISION LEVEL DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 MICROCIRCUIT, MEMORY, DIGITAL, CMOS 8000 GATE CONFIGURABLE LOGIC ARRAY, MONOLITHIC SILICON SIZE ICICE CODE 5962-94634 A 6726

3、8 I SHEET 1 OF 22 )ESC FORM 193 JUL 94 DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-94634 9999996 0078733 295 - STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTR

4、ONICS SUPPLY CENTER DAYTON, OHIO 45444 1. SCOPE SIZE 5962-94634 A REVISION LEVEL SHEET 2 1.1 Scope. This drawing forms a part of a one part - one part nunber documentation system (see 6.6 herein). Two product assurance classes consisting of military high reliability (device classes Q and M) and spac

5、e application (device class V), and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Nunber (PIN). 1.2.1 of MIL-STD-883, “Provisions for the use of MIL-STD-883 in conjunction with compliant non-JAN devicesIl. available, a choice of Radiation Hard

6、ness Assurance (RHA) levels are reflected in the PIN. Device class M microcircuits represent non-JAN class i3 microcircuits in accordance with When I 1.2 PIN. lhe PIN shall be as shown in the following example: X I I Lead i I Case -r I Device P 5962 94634 I Device II Federal RHA stock class designat

7、or tw class outline finish designator (1.2.1) (See 1.2.2) designator (See 1.2.4) (See 1.2.5) / (See 1.2.3) / Drawing nunber 1.2.1 RHA designator. Device class M RHA marked devices shall meet the MIL-1-38535 appendix A specified RHA levels and shall be marked uith the appropriate RHA designator. MIL-

8、1-38535 specified RHA levels and shall be marked with the appropriate RHA designator. non-RHA device. Device classes Q and V RHA marked devices shall meet the A dash (-) indicates a 1.2.2 Device type(s). lhe device type(s) shall identify the circuit function as follows: Device type Generic nunber Ci

9、rcuit function Access time o1 8820 - 3 672 logic cell configurable array 38.2 ns 1.2.3 Device class designator. The device class designator shall be a single letter identifying the product assurance level as follows: I Device class Device requirements docwntation M Vendor self-certification to the r

10、equirements for non-JAN class i3 microcircuits in accordance with 1.2.1 of MIL-STD-883 Q or V Certification and qualification to MIL-1-38535 1.2.4 Case outline(s). The case outlines shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X

11、 Y CMGA9-P192 See figure 1 192 I/ Fin grid array package 208 Quad-flat package 1.2.5 Lead finish. lhe lead finish shall be as specified in MIL-STD-883 (see 3.1 herein) for class M or MIL-1-38535 for classes Q and V. Finish letter laxla shall not be marked on the microcircuit or its packaging. The “X

12、“ I designation is for use in specifications when lead finishes A, B, and C are considered acceptable and interchangeable Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SND-5962-94634 W 9999996 0078734 121 W STANDARD MICROCIRCUIT DRAWING DEFENSE ELE

13、CTRONICS SUPPLY CENTER DAYTON, OHIO 45444 1.3 Absolute maximum ratin s. 2/ supply voltage range to :round potential (v DC input voltage range - - - - - - - - - -C DC output current, IO, per pin- - - - - - - - DC supply current, ICC or ISS - - - - - - - - Maxim power dissipation (PD)- - - - - - - - L

14、ead tenperature (soldering, 10 seconds) - - Therm L resi stance, junction- to-case (O,) : case outline x - - - - - - - - - - - - - Case outline y - - - - - - - - - - - - - Junction tenperature (TJ) - - - - - - - - - - Storage temperature range - - - - - - - - - - SIZE 5962-94634 A REVISION LEVEL SHE

15、ET -2.0 V dc to +7.0 V dc -2.0 V dc to +7.0 V dc min -25 mA and max +25 mA 1000 mA 5.5 W +260DC See MIL-STD-1835 +150C I/ 12OC/W z/ -65C to +150“C -55C to +125“C +4.5 V dc minim to +5.5 V dc maxim O V dc to Vcc O V dc to Vcc 40 ns MX 40 ns max - 5/ percent 2.1 Government specification, standards, bu

16、lletin, and handbook. Unless otherwise specified, the following Gpecification, standards, bulletin, and handbook of the issue listed in that issue of the Department of Defense Index )f Specifications and Standards specified in the solicitation, form a part of this drawing to the extent specified ier

17、ein. SPECIFICATION MILITARY MIL-1-38535 - integrated Circuits, Manufacturing, General Specification for. STANDARDS MILITARY MIL-STD-883 - Test Methods and Procedures for Microelectronics. MIL-STD-973 - Configuration Management. MIL-STD-1835 - Microcircuit Case Outlines. BULLETIN Mi LITARY MIL-BUL-10

18、3 - List of Standard Microcircuit Drawings (SMDs). HANDBOOK MILITARY MIL-HDBK-780 - Standardized Military Drawings. (Copies of the specifications, standards, bulletin, and handbook required by manufacturers in connection with specific acquisition functions should be obtained from the contracting act

19、ivity or as directed by the contracting sctivi ty.) :/ 3/ i/ ?/ Stresses above the absolute maxim rating may cause permanent damage to the device. maximun levels may degrade performance and affect reliability. Maxim junction temperature shall not be exceeded except for allowable short duration burn-

20、in screening conditions in accordance with method 5004 of MIL-STD-883. All voltage values in this drawing are with respect to Vss. When a QML source exists, a value shall be provided. Extended operation at the DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted

21、 without license from IHS-,-,-SMD-5762-94634 9999996 0078735 068 = 7- , 2.2 Non-Govermient wblications. lhe following docwnts form a part of this document to the extent specified Unless otherwise specified, the issues of the docunents uhich are DoD adopted are those listed in the issue herein. of th

22、e D001SS cited in the solicitation. are the issues of the docunents cited in the solicitation. Unless otherwise specified, the issues of documents not listed in the DOOISC AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-88 - Standard Guide for the Measurement of Single Event Ph

23、enomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications for copies of ASTM publications should be addressed to the American Society for Testing and Materials, 1916 Race Street, Philadelphia, PA 19103.) ELECTRONICS INDUSTRIES ASSOCIATIOW (EIA) JEDEC Standard No. 17 - A Standardized

24、 Test Procedure for the Characterization of Latch-up in CMOS Integrated Circuits. (Applications for copies should be addressed to the Electronics industries Association, 2500 Ui lson Boulevard, Arlington, VA 22201.) (Non-Govermient standards and other publications are normally available from the org

25、anizations that prepare or distribute the docwnts. services.) These docunents also may be available in or through libraries or other informational 2.2 Order of precedence. In the event of a conflict betueen the text of this drawing and the references cited herein, the text of this drawing shall take

26、 precedence. 3. REQUIREMENTS 3.1 item requirements. The individual item requirements for device class M shall be in accordance with 1.2.1 of MIL-STD-883, InProvisions for the use of MIL-STD-883 in conjunction uith compliant non-JAN devicesnn and as specified herein. The individual item requirements

27、for device classes Q and V shall be in accordance with MIL-1-38535, the device manufacturers Quality Management (PMI plan, and as specified herein. The modification in the PM plan shall not effect the form, fit, or function as described herein. 3.2 Desian. construction. and physical dimensions. The

28、design, construction, and physical dimensions shall be as specified in MIL-STD-883 (see 3.1 herein) for device class M and MIL-1-38535 for device classes P and V and herein. 3.2.1 Case outline(s1. lhe case outline(s) shall be in accordance with 1.2.4 herein. 3.2.2 Terminal connections. 3.2.3 Truth t

29、able. 3.2.4 Radiation exposure circuit. The terminal connections shall be as specified on figure 2. The truth table shall be as specified in figure 3. The radiation exposure circuit shall be provided when RHA product becomes available. 3.3 Electrical performance characteristics and postirradiation p

30、arameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table i and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. lhe electrical test requirements shall be

31、the subgroups specified in table IIA. lhe electrical tests for each subgroup are defined in table I. 3.5 Marking. lhe part shall be marked uith the PIN listed in 1.2 herein. Marking for device class M shall be in accordance with MIL-STD-883 (see 3.1 herein). In addition, the manufacturers PIN may al

32、so be marked as listed in MIL-BUL-103. Marking for device classes Q and V shall be in accordance uith MIL-1-38535. 3.5.1 Certification/cmliance mark. lhe compliance mark for device class M shall be a ntCnn as required in MIL-STD-883 (see 3.1 herein). in MIL-1-38535. lhe certification mark for device

33、 classes Q and V shall be a ntQMLnn or tnQnn as required STANDARD SIZE 5962-94634 MICROCIRCUIT DRAWING n DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL SHEET 4 DESC FORM 193A JUL 94 , Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,

34、-,-t STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 SMD-5962-94634 9999976 0078736 TT4 = SIZE 5962-94634 A REVISION LEVEL SHEET 3.6 Certificate of cowliance. For device class M, a certificate of compliance shall be required from a manufacturer in order to be liste

35、d as an approved source of supply in MIL-BUL-103 (see 6.7.2 herein). classes Q and V, a certificate of conpliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.7.1 herein). The certificate of compliance submitted to DESC-EC prior

36、 to listing as an approved source of supply for this drauing shall affirm that the manufacturers product meets, for device class M, the requirements of MIL-STD-883 (see 3.1 herein), or for device classes Q and V, the requirements of MIL-1-38535 and the requirements herein. For device 3.7 Certificate

37、 of conformance. A certificate of conformance as required for device class M in MIL-STD-883 (see 3.1 herein) or for device classes Q and V in MIL-1-38535 shall be provided uith each lot of microcircuits delivered to this drauing. 3.8 Notification of change for device class M. For device class M, not

38、ification to DESC-EC of change of product (see 6.2 herein) involving devices acquired to this drauing is required for any change as defined in MIL-STO-973. 3.9 Verification and review for device class M. For device class M, DESC, DESCs agent, and the acquiring activity Offshore documentation retain

39、the option to review the manufacturers facility and applicable required documentation. shall be made available onshore at the option of the revieuer. 3.10 Microcircuit group assiswnt for device class M. Device class M devices covered by this drauing shall be in microcircuit group nunber 42 (see MIL-

40、1-38535, appendix A). 4. QUALITY ASSURANCE PROVISIONS 4.1 Sanuling and inswction. For device class M, sampling and inspection procedures shall be in accordance uith MIL-STD-883 (see 3.1 herein). For device classes (II and V, sampling and inspection procedures shall be in accordance uith MIL-1-38535

41、or as modified in the device manufacturers Quality Management (QM) plan. plan shall not effect the form, fit, or function as described herein. lhe modification in the QM 4.2 Screening. For device class M, screening shall be in accordance uith method 5004 of MIL-STD-883, and shall be conducted on all

42、 devices prior to quality conformance inspection. For device classes Q and V, screening shall be in accordance uith MIL-1-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. 4.2.1 Additional criteria for device class M. a. Delete the sequence sp

43、ecified as initial (pre-burn-in) electrical parameters through interim (post-burn-in) electrical parameters of method 5004 and substitute lines 1 through 6 of table 1IA herein. b. For device class M, the test circuit shall be maintained by the manufacturer under document revision level control and s

44、hall be made available to the preparing or acquiring activity upon request. For device class M the test circuit shall specify the inputs, outputs, biases, and pouer dissipation, as applicable, in accordance uith the intent specified in test method 1015. c. Interim and final electrical test parameter

45、s shall be as specified in table IIA herein. 4.2.2 Additionai criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature or approved alternatives shall be as specified in the device manufacturers QM plan in accordance uith MIL-1-38535. circuit shall be mai

46、ntained under document revision level control of the device manufacturers Technology Review Board (TRB) in accordance uith MIL-1-38535 and shall be made available to the acquiring or preparing activity upon request. biases, and power dissipation, as applicable, in accordance uith the intent specifie

47、d in test method 1015. The burn-in test The test circuit shall specify the inputs, outputs, b. Interim and final electrical test parameters shall be as specified in table IIA herein. c. Additional screening for device class V beyond the requirements of device class O shall be as specified in appendi

48、x B of MIL-1-36535. DESC FORM 193A JUL 94 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-59b2-94b34 999999b 0078737 930 I High level output voltage Low levei output vol tage vcc stew suppiy Icco current I1 Input leakage current Output leakage cu

49、rrent Input capacitance cIN Output capacitance Functional test I Register to register via ItDRR interconnects and 4 local interconnects 4 logic elements, 3 row I/ I lest /iWl I Vcc = 5.5 V , ;IL = 0.8 V 1,2,3 All 0.45 IoL = 8.0 M, IH = 2.0 V V I tsTAY Max nstatus pin low time See 4.4.le 4 Al l 15 PF See 4.4.1 7,8A188 All VI, = O V and 5.5 V v, = 5.5 v (OE register data delay ItIm tIOC IOE register control signal delay /JA i +lo 1 1 1,2,3 1 All I -10 I - 3/ 101 I 2.0 n