DLA SMD-5962-93007 REV D-1996 MICROCIRCUIT DIGITAL CMOS TWO DIMENSIONAL CONVOLVER MONOLITHIC SILICON《硅单片 二维卷积器 氧化物半导体数字微型电路》.pdf

《DLA SMD-5962-93007 REV D-1996 MICROCIRCUIT DIGITAL CMOS TWO DIMENSIONAL CONVOLVER MONOLITHIC SILICON《硅单片 二维卷积器 氧化物半导体数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-93007 REV D-1996 MICROCIRCUIT DIGITAL CMOS TWO DIMENSIONAL CONVOLVER MONOLITHIC SILICON《硅单片 二维卷积器 氧化物半导体数字微型电路》.pdf（19页珍藏版）》请在麦多课文档分享上搜索。

1、SMD-59b2-93007 REV D 999999b 009042b 779 = DEFENSE LOGISTICS AGENCY DEFENSE SUPPLY CENTER COLUMBUS 3990 EAST BROAD STREET COLUMBUS, OH 4321 6-5000 IN REPLY REFER ro: DSCC-VAC (Mr. Gauder/(DSN)850-545/614-692-545) DEC O 2 1996 SUBJECT: Notice of Revision (NOR) 5962-RO44-97 for Standard Microcircuit D

2、rawing (SMD) 5962-93007. Military/Industry Distribution The enclosed NOR is approved for use effective as of the date of the NOR. In accordance with MIL-STD-100 SMD holders should, as a minimum, handwrite those changes described in the NOR to sheet 1 of the subject SMD. After completion, the NOR sho

3、uld be attached to the subject SMD for future reference. Those companies who were listed as approved sources of supply prior to this action have agreed to actions taken on devices for which they had previously provided DSCC a certificate of compliance. This is evidenced by an existing active current

4、 certificate of compliance on file at DSCC with a DSCC record of verbal coordination. The certificate of compliance for these devices is considered concurrence with the new revision unless DSCC is otherwise notified. DSCC has received and accepted a certificate of compliance from Logic Devices, cage

5、 code 65896 for PINS 5%2-9300701MYX, 5962-9300702MYX and 5962-9300703MYX and vendor similar part numbers LF48908GMB50, LF48908GMB37 and LF48908GMB25, respectively. This action will be reflected in the next revision of MIL-HDBK-103. If you have comments or questions, please contact Larry T. Gauder at

6、 (DSN)8504545/(614)692-0545. 1 Encl Chief, Custom Microelectroncs Team Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-59b2-93007 REV D 9999996 0090427 605 (YYMMDD) - 1. DATE 96-1 1-05 NOTICE OF REVISION (NOR) THIS REVISION DESCRIBED BELOW HAS BE

7、EN AUTHORIZED FOR THE DOXVvlENT USTED. I I 9. TITLE OF DOCUMENT MICROCIRCUIT, DIGITAL, CMOS, TWO DIMENSIONAL CONVOLVER MONOLITHIC SILICON 1 O. REVISION LETTER a. CURRENT b. NEW C D Public reporting, burden for,thig +iec add “DI1. Revisions description colum; add IlChanges in accordance with NOR 5962

8、-R044-9718. Revisions date colm; add 196-11-0511. Revision level block; add I1Dmt. Rev status of sheets; for sheet 1 2, 3, and 8, add I1Da1. . Add the following package: Sheet 2: 1.2.4 me outlia Plbtline letter criotive desi- - IlY CWA15 -Pa 84 pi n- g r id ar ray“. Revision level block; add I1Dl8.

9、1.3 usolute maxm ratinw . Change from: Vhermal resistance:I to “Thermal resistance, Case X and YIi. Revision level block; add I1Dl8. Sheet 3: Sheet 8: FIGURE 1. JPrrninal connect iorig. Add Case I1X and YIi to top of figure. Revision level block; add 11Dm8 . TITLE Chief, Custom Microelectronics e. S

10、IGNATURE Monica L. Poelking f. DATE SIGNED (YYMMDD) 96-1 1-05 ID Form 1695, APR 92 Previous editions are obsolete. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-these tests shall have been fault graded in accordance with MIL-STD-883, test method 50

11、12 (see 1.5 herein). Subgroup 4 (C, and Co measurement) shall be measured only for the initial test and after process or design changes which may affect input or output capacitance. failures. c. Test all applicable pins on five devices uith zero STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPP

12、LY CENTER DAYTON, OHIO 45444 4.4.2 Group C inspection. lhe group C inspection end-point electrical parameters shall be as specified in table II herein. SIZE 5962-93007 A FEVISICNLNEL 9-EE-r r 12 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-Test re

13、quirements Device Device class M class P Subgrwps subgroups (in accordance with (in accordance with MIL-STD-883, MIL-1-38535, table I II 1 I I I I Final electrical parameters (see 4.21 Interim electrical parameters (see 4.2) 1, 2, 3, 7, 8, I/ 1, 2, 3, 7, 11 9, 10, 11 8, 9, 10, 11- Group A test requi

14、rements (see 4.4) I I 1, 2. 3, 4, 7, 8, 9, 10, 11 8, 9, 10, 11 1, 2, 3, 4, 7 Group D end-point electrical parameters (see 4.41 I I I I 1, 7, 9 Group C end-point electrical parameters (see 4.4) I 1, 7, 9 STANDARD MICROCIRCUIT DRAWING DEFENSE ELECTRONICS SUPPLY CENTER I I I SIZE 5962-93007 A DAYTON, O

15、HIO 45444 I I I RNISICNLML SET C 13 Group E end-point electrical parameters (see 4.4) Device class V 1, 2, 3, 7, 21 8, 9, 10, 11 1, 2. 3, 4, 7, 8. 9. 10. 11 1, 7, 9 1, 7, 9 - 1/ PDA applies to subgroup I. - 2/ PDA applies to subgroups 1 and 7. 4.4.2.1 Additional criteria for device class M. Steady-s

16、tate life test conditions, method 1005 of MIL-STD-883: a. Test condition A, E, C or D. level control and shall be made available to the preparing or acquiring activity upon request. circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent

17、 specified in test method 1005. The test circuit shall be maintained by the manufacturer under docunent revision The test b. TA = +125OC, minim. c. Test duration: 1,000 hours, except as permitted by method 1005 of MIL-STD-883. 4.4.2.2 Additional criteria for device classes Q and V. The steady-state

18、life test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-1-38535. The test circuit shall be maintained wider docunent revision Level control by the device manufacturers TRB, in accordance with M

19、IL-1-38535, and shall be made available to the acquiring or preparing activity upon request. accordance with the intent specified in test method 1005. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in 4.4.3 Group D inswction. The group D inspection

20、end-point electrical parameters shall be as specified in table II herein. I I I Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,- SMD-5962-73007 REV C = b 0072053 051 - STANDARD SIZE MICROCIRCUIT DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHI

21、O 45444 FWISICNLML C 4.4.4 Group E inswction. Group E inspection is required only for parts intended to be marked as radiation hardness assured (see 3.5 herein). device class M shall be M and D. RHA levels for device classes P and V shall be M, D, L, R, F, G, and H and for a. b. End-point electrical

22、 parameters shall be as specified in table II herein. For device class U, the devices shall be subjected to radiation hardness assured tests as specified in MIL-1-38535, appendix A, for the RHA level being tested. vehicle shall be subjected to radiation hardness assured tests as specified in MIL-1-3

23、8535 for the RHA level being tested. defined in table 1 at TA = +25“C t5“C, after exposure, to the subgroups specified in table II herein. Uhen specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied. For device classes P and V, the devices or test ALL device cl

24、asses must meet the postirradiation end-point electrical parameter limits as c. 5. PACKAGING 5.1 herein) for device class M and MIL-1-38535 for device classes P and V. Packaging reauirements. The requirements for packaging shall be in accordance with MIL-STD-883 (see 3.1 6. NOTES 6.1 Intended use. M

25、icrocircuits conforming to this drawing are intended for use for Govermient microcircuit applications (original equipment), design applications, and logistics purposes. contractor-prepared specification or drawing. 6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same gen

26、eric device covered by a 6.1.2 Substitutability. 6.2 Configuration control of SMDs. All proposed changes to existing SMDs uill be coordinated with the users of record for the individual docunents. This coordination will be acconplished in accordance with MIL-STD-973 using DD Form 1692, Engineering C

27、hange Proposal. application requires configuration control and which SMDs are applicable to that system. of users and this list will be used for coordination and distribution of changes to the drawings. covering microelectronic devices (FSC 5962) should contact DESC-EC, telephone (513) 296-6047. Dev

28、ice class P devices will replace device class M devices. 6.3 Record of users. Military and industrial users shall inform Defense Electronics Supply Center when a system DESC will maintain a record Users of drawings 5962-93007 S-EET 14 6.4 Comnents. Comments on this drawing should be directed to DESC

29、-EC, Dayton, Ohio 45444-5270, or telephone (513) 296-5377. 6.5 Abbreviations. symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-1-38535 and MIL-STD-1331 and as follows: vcc CND CLK DINO-7 CINO-9 DOUTO-I9 The +5 V puer supply pins. The device ground.

30、 Input and System clock. Pixel Data input bus. be provided in a synchronous fashion, and is latched on the rising edge of the CLK signal. Coefficient input bus. This input bus is used to load the Coefficient Mask registers(s), the initialization register, the Row Buffer length register and the ALU m

31、icrocode. provide a second operand input to the ALU. bits AO-2. The CINO-9 data is loaded to the addressed register through the use of the CS# and LD# inputs. Output data bus. of products of the input data sernples and their corresponding coefficients. may also be added to the result by selecting th

32、e appropriate cascade de in the initialization register. 0.1 pF capacitors between the V, and GND pins are recomnended. Operations are synchronous with the rising edge of this clock signal. This bus is used to provide the 8-bit pixel input data to the device. The data must It may also be used to The

33、 definition of the CINO-9 is defined by the register address This 20-bit output port is used to provide the convolution result. The result is the sum The cascade inputs CASIO-15 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-5962-93007 REV C 799

34、9776 0072054 T9 SIZE STANDARD DEFENSE ELECTRONICS SUPPLY CENTER MICROCIRCUIT DRAWING A DAYTON, OHIO 45444 FINISICNLEVEL CAS I O- 15 CASOO-7 FRAME# EALU HOLD RESET# OE# AO-2 LD# CS# 5962-93007 SEET Cascade input bus. kernels or row sizes. is determined by the Cascade Mode bit (bit O) of the initializ

35、ation register. IO, the value on CASIO-15 is left shifted and added to DOUTO-19. The amount of the shift is determined by bits 7-8 of the initialization register. be used to add an offset value, such as to increase the brightness of the convolved image. When the cascade mode bit is set to a l, this

36、bus is used for interfacing to external row buffers. this mode the bus is divided into two 8-bit buses (CASIO-7 and CASI8-15), thus allowing two additional pixel data inputs. larger row sizes without using multiple devices. Cascade output bus. This output data is the data on DINO-7 delayed by twice

37、the prograrmned internal row buffer length. Frame # is an asynchronous new frame or vertical sync input. circuitry except for the coefficient, ALU, AMC, EOR and INT register. occurred, a new frame of pixels may be convolved without reloading these registers. Enable ALU input. CINO-7 is loaded on the

38、 next rising clock edge. register. The hold input is used to gate the clock from all of the internal circuitry of the device. synchronous and is sampled on the rising edge of CLK and takes effect on the following cycle. signal is active (high), the clock will have no effect on the device and interna

39、l data will remain undisturbed. Reset is an asynchronous signal which resets all internal circuitry of the device. low in the reset state. Output enable. line enables the port for output. Processing is not interrupted by this pin. Control register address. destination for the data on the CINO-9 inpu

40、ts. inputs. Load strobe. the rising edge of LD# will latch the CINO-7 data into the register specified by AO-2. Chip select. address lined are decoded to determine the meaning of the data on the CINO-7 bus. will then load the addressed register. This bus is used for cascading multiple devices to all

41、ow convolution with larger It may also be used to interface to external row buffers. The function of this bus When this bit is set to a While this mode is intended primarily for cascading, it may also In The cascade data is sent directly to the internal multiplier array which allows for This bus is

42、used primarily during cascading to handle larger frames or kernel sizes. A low on this input resets all internal Thus, after a Frame# reset has This control line gates the clock to the ALU register. When it is high, the data on When EALU is low, the last value loaded remains in the ALU This signal i

43、s Uhile this All outputs are forced The E# input controls the state of the output data bus (DOUTO-19). A low on this control When OE# is high, the output drivers are in the high impedance state. These lines are decoded to determine which register in the control logic is the Register loading is contr

44、olled by the AO-2, LD#, and CS# LD# is used for loading the internal registers of the device. Uhen CS# and LD# are active, The chip select input enable loading of the internal registers. When CS# is low, the AO-2 The rising edge of LD# 6.6 One part - one part nimber system. The one part - one part n

45、unber system described below has been developed to allow for transitions between identical generic devices covered by the three major microcircuit requirements documents (MIL-H-38534, MIL-1-38535, and 1.2.1 of MIL-STD-883) without the necessity for the generation of unique PINS. The three military r

46、equirements docunents represent different class levels, and previously when a device manufacturer upgraded military product from one class level to another, the benefits of the upgraded product were unavailable to the Original Equipment Manufacturer (EM), that was contractually locked into the origi

47、nal unique PIN. establishing a one part nunber system covering all three docunents, the OEM can acquire to the highest class level available for a given generic device to meet system needs without modifying the original contract parts selection cri teri a. By Manufacturing Docunent Exanple PIN Milit

48、ary docunentation format under new system source listing listing New MIL-H-38534 Standard Microcircuit 5962-XXXXXZZ(H or K)YY QML-38534 D raw i ngs New MIL-1-38535 Standard Microcircuit 5962-XXXXXZZ(P or V)YY QML-38535 Drawings MIL-BUL-103 MIL-BUL-103 5962-XXXXXZZ(M)YY MIL-BUL-103 MIL-BUL-103 Neu 1.

49、2.1 of MIL-STD-883 Standard Microcircuit Drawings I I I C 15 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SUD-5962-93007 REV C m 9999996 0072055 924 STANDARD SIXE MICROCIRCUIT DRAWING A DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 t4wISIOvLML C 5962-93007 SEET 16 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,