DLA SMD-5962-93006 REV B-1999 MICROCIRCUIT DIGITAL CMOS DIGITAL SIGNAL PROCESSOR MONOLITHIC SILICON《硅单片 数字信号处理器 氧化物半导体数字微型电路》.pdf

《DLA SMD-5962-93006 REV B-1999 MICROCIRCUIT DIGITAL CMOS DIGITAL SIGNAL PROCESSOR MONOLITHIC SILICON《硅单片 数字信号处理器 氧化物半导体数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-93006 REV B-1999 MICROCIRCUIT DIGITAL CMOS DIGITAL SIGNAL PROCESSOR MONOLITHIC SILICON《硅单片 数字信号处理器 氧化物半导体数字微型电路》.pdf（31页珍藏版）》请在麦多课文档分享上搜索。

1、flD-5qbz-9300b REV B 9qqq59b OL4b4bb 157 m 1. DATE (YYMMDD) THIS REVISION DESCRIBED BELOW HAS BEEN AUTHORIZED FOR THE DOCUMENT LISTED. a ( Onel ublic reporting burden for. this collection is estimated to avera e 2 hours er response, includin the time for, reviewing istructions, searching existing da

2、ta sources gathering and main?ainin the data needed, and compgeting and reviewing the oiiection of information. Send,comments regardin this burden estim je or an other aspect of this collection of information, icludin su gestions for reducing this burden to l?yflment of Defense Wash ton Head uarters

3、 Services Directorate for .iforma!on 8perations and ReDorts. 1215 Jefferson avis Hiahwav. Suite 1204. Arl?naton. VA!2202-4302. andto the Office of X (1) Existing document supplemented by the NOR may be used in manufacture. (2) Revised document must be received before manufacturer may incorporate thi

4、s change. (3) Custodian of master document shall make above revision and furnish revised document. nana ement and Bud et Paprwork Reduction Project 0704 018-8 Washin ton DC 20503. ,ORM TO THE GOVERNMENT ISSUING CONTRACTING OFFICER FOR THE CONTRACT/ PROCURING ACTIVITY JUMBER LISTED IN ITEM 2 OF THIS

5、FORM. ;LEASE DO NOT RACIRN YOUR COMPLETED FOAM TO EiTkER OF ?HESE ADDRESSED. RETURN COMPLETED 1. ORIGINATOR b. ADDRESS (Street, City, State, Zip Code) Defense Supply Center, Columbus 3990 East Broad Street Columbus, OH 4321 6-5000 I. TYPED NAME (First, Middle Initial, Last) 5. CAGE CODE 67268 7. CAG

6、E CODE 67268 3. TITLE OF DOCUMENT MICROCIRCUIT, DIGITAL, CMOS, DIGITAL SIGNAL PROCESSOR, MONOLITHIC SILICON 10. REVISION LETTER I a I b.NEW B Form Approved OMB NO. 0704-0im 2. PROCURING ACTIVITY NO 3. DODAAC 6. NOR NO. 5962-R081-99 8. DOCUMENT NO. 5962-93006 11. ECP NO. No users listed 12. CONFIGURA

7、TION ITEM (OR SYSTEM) TO WICH ECP APPLIES All 13. DESCRIPTION OF REVISION Sheet 1: Revisions Itr column; add “B, Revisions description column; add “Changes in accordance with NOR 5962-R081-99“. Revisions date column; add “99-09-23. Revision level block; change from “A to “B. Rev status of sheets; fo

8、r sheet 1 change to “B“, For sheet 3 add “B“. Sheet 3: Paragraph 1.3 Absolute maximum ratincis. Junction temperature (TJ: delete “+175“C“ and replace “+150C - Paragraph 1.4 Recommended owratinq conditions. Delete the following:“DO-D15, INT, NMIIMFMP, RXD, TXD, TCLKIICLK, TCLWCLKX . . . . . . . . . .

9、 +2.0 V dc“ and replace “DO-D15, INT, RXD, TXD, TCLKlICLK, TCLUICLKX . . .-. . +2.tJV dc“. Add the following “NMII MC/MP . . . . . . . +2.2 V dc“. Revision level block; add “B. b. ACTIVITY AUTHORIZED TO APPROVE CHANGE FOR I c. TYPED NAME (First, Middleplnitial, Last) GOVERNMENT DSCC-VAC d. TITLE CHI

10、EF, ACTIVE DEVICES TEAM 15a. ACTIVITY ACCOMPLISHING REVISION DSCC-VAC MONICA L. POELKING e. SIGNATURE MONICA L. POELKING f. DATE SIGNED (YYMMDD) 99-09-23 b. REVISION COMPLETED (Signature) Larry T. Gauder c. DATE SIGNED (YYMMDD) 99-09-23 DD Form 1695, APR 92 Previous editions are obsolete. Provided b

11、y IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-59b2-9300b REV A = 999999b O090049 642 DEFENSE LOGISTICS AGENCY DEFENSE SUPPLY CENTER COLUMBUS 3990 EAST BROAD STREET COLUMBUS, OH 4321 6-5000 IN REPLY REFER TO: DSCC-VAC (Mr. Gauder/(DSN)850-0545/614-692-054

12、5) NOV 0 7 SUBJECT: Notice of Revision (NOR) 5962-R221-96 for Standard Microcircuit Drawing (SMD) 5962-93006. Military/Industry Distribution The enclosed NOR is approved for use effective as of the date of the NOR. In accordance with MIL-STD-100 SMD holders should, as a minimum, handwrite those chan

13、ges described in the NOR to sheet 1 of the subject SMD. After completion, the NOR should be attached to the subject SMD for future reference. Those companies who were listed as approved sources of supply prior to this action have agreed to actions taken on devices for which they had previously provi

14、ded DSCC a certificate of compliance. This is evidenced by an existing active current certificate of compliance on file at DSCC with a DSCC record of verbal coordination. The certificate of compliance for these devices is considered concurrence with the new revision unless DSCC is otherwise notified

15、. If you have comments or questions, please contact Larry T. Gauder at (DSN)850-0545/(614)692-0545. 1 Encl + add I1A1l. Revisions description colum; add IlChanges in accordance with NOR 5962-R221-96“. Revisions date column; add 1196-10-091i. Revision level block; add llA1l. Rev status of sheets; for

16、 sheet 1, 6 and 19, add llAtl. Sheet 6: TABLE 1. Input current I, conditions colunn add the following: e. SIGNATURE f. DATE SIGNED (YYMMDD) Monica L. Poelking 96-1 0-09 b. REVISION COMPLETED (Signature) Larry T. Gauder c. DATE SIGNED (YYMMDD) 96-1 0-09 w-=-o. V to 2.4 v dc,kx i20 r for special input

17、 pins, T add1IAl1. Sheet 19: FIGURE 3. Mveform. Bit 1/0 timing, delete I1trfi (I0P)l8 and substitute I1trfl (Iop)ll. Revision level block; add I1Al1. 14. THIS SECTION FOR GOVERNMENT USE ONLY (1) Existing document supplemented by the NOR may be used in manufacture. (2) Revised document must be receiv

18、ed before manufacturer may incorporate this change. (3) Custodian of master document shall make above revision and furnish revised document. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-DESCRIPTION LTR PREPARED BY Thomas M. Hess DATE (YR-M-DA) APP

19、ROVED I REV SHEET REV SHEET REV SHEET CHECKED BY Thomas M. Hess 15 16 17 APPROVED BY Monica L. Poelking SIZE A DRAWING APPROVAL DATE 93-05-14 CAGE CODE 5962-93006 67268 REVISION LEVEL DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 MICROCIRCUIT, DIGITAL, CMOS, DIGITAL SIGNAL PROCESSOR, MONOLITH

20、IC SILICON SHEET 1 OF 27 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-59b2-9300b m 9999996 OOVLb45 889 m 1. SCPE 1.1 Scopa. Thia drawing form e prt of a we part - one part mnbcr docuaentation systr (am 6.6 herein). Tuo prbduct assurance clasae

21、r msiJtihg 8f military high rrliability (device classes 8, Q, ad I) and apace application (device clarres $ and VI, and u choicb of card outLiclCs and lead finishes are available and are reflected in th(? Pert or Identifying Number (PINI. Device class II iiGtWircults represent nbn-JAN blS88 B Licroc

22、ircuits in accordance with 1.2.1 of MIL-STD-, 81Provirions for the ufc of NIL-STb-8Bf in cohjunction with cQlipliaht non-JAN devices“. available, a ckice of Rdiation Hardnesr AlUrrance (W) Lwda aire reflected in the PlN. Uhen 1.2 G. The PIN shall be as shown in the following exaiipla: - w X X I I I

23、I I 5962 01 I I I I I I I Lacid COSS Dwi ce WlCC II Federal w3A stock class designator tYPc cliiss outline fihish designator bee 1.2.11 (aee 1.2.2) , designator (see 1.2.4) (see 1.2.5) / (aee 1.2.3) / Drawing number 1.2.1 RHA desirmator. Device classe? N, B, and S RHA marked devicea shall meet the N

24、IL-N-38510 specified RHA levels and ahall be narked with the appropriate RHA designator. Dewice classes Q and V WA marked devices shall wet the MIL-1-38535 specified RHA levels and shell be marked with the appropriate RHA onducted on all devices prior to quality conformance inspection. For device cl

25、asses Ei and S, screening shall be in iccordance with method 5004 of MIL-STD-883, and shall be conducted on all devices prior to qualification and quality :onformance inspection. For device classes Q and V, screening shall be in accordance with MIL-1-38535, and shall be :onducted on all devices prio

26、r to qualification and technology conformance inspection. 4.2.1 Additional criteria for device classes M, B. and S. a. Burn-in test, method 1015 of HIL-STD-883. (1) Test condition A or D. For device class M, the test circuit shall be maintained by the manufacturer under document revision level contr

27、ol and shall be made available to the preparing or acquiring activity upon request. activity. and power dissipation, as applicable, in accordance with the intent specified in test method 1015. For device classes B and S, the test circuit shall be submitted to the qualifying For device classes M, B,

28、and S, the test circuit shall specify the inputs, outputs, biases, (2) TA = +125Oc, minimum. Interim and final electrical test parameters shall be as specified in table II herein, except that interim electrical tests prior to burn in are optional at the discretion of the manufacturer for device clas

29、s M. A data retention stress test shall be included as part of the screening procedure and shall consist of the following steps: b. c. Erase, (see 3.12.1). Program all Os, (see 3.12.2). Test at +25C. Unbiased bake for 72 hours at +165OC *5OC. Measure Vcc max and store this value in the signature row

30、. Hargin test at +25C. with a delta greater than 0.66 V or with Vcc max less than 6.0 V consitiutes a failure. and verify the r bit. Erase, (see 3.12.1). Program with random code. Burn-in (see 4.2.la). Measure Vcc tnax and compare with the value stored in the signature row. Any part Also program Ver

31、ify this at max Vcc, (see 3.12.2). Refresh EPROM data. Verify EPROM array at max Vcc and +25C, (see 3.12.3). (IO) Test at +125OC and max Vcc. (11) Test at -55OC and MX Vcc. (12) Erase, (see 3.12.1). (13) Verify erasure at +25OC, (see 3.12.3). Refresh EPROM data. Verify EPROM array, (see 3.12.3) Refr

32、esh EPROM data. Verify EPROM array, (see 3.12.3). 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-1-38535. The burn-in te

33、st circuit shall be maintained under document revision level control of the device manufacturers Technology Review Board (TRB) in accordance with NIL-1-38535 and shall be made available to the acquiring or preparing activity upon request. applicable, in accordance with the intent specified in test m

34、ethod 1M5. Interim and final electrical test parameters shall be as specified in table LI herein. Additional screening for device class V beyond the requirements of device class Q shall be as specified in appendix B of MIL-1-38535. The test circuit shall specify the inputs, outputs, biases, and powe

35、r dissipation, as b. c. STANDARDIZED 5962-93006 MILITARY DRAWING DEFENSE ELECTRONICS SUPPLY CENTER DAYTON, OHIO 45444 REVISION LEVEL DESC FORM 193A JUL 91 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-SMD-59b2-9300b m 999999b 0043665 b? m STADARDI

36、ZED MILITARY DRAUIG DEFENSE ELECTRONICS SUPPLY CEMTER DAYTON, OIT10 45444 4.3.1 ualification inspection for device classes B and S. Qualification inspection for device classes B and S I shall be in accordance with HIL-H-38510. Inspections to be performed shall be those specified in method 5005 of SI

37、ZE 5962-93006 A REVISION LEVEL SEET 22 HIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.5). 4.3.2 Qualification inspection for device classes Q and V. ualification inspection for device classes Q and V shall be in accordance with HIL-1-38535. herein for groups A

38、, 8, C, D, and E inspections (see 4.4.1 through 4.4.5). Inspections to be performed shall be those specified in NIL-1-38535 and 4.4 Conforniance inspection. Quality conformance inspection for device class I4 shall be in accordance with HIL-STD-883 (see 3.1 herein) and as specified herein. be in acco

39、rdance with HIL-H-38510 and as specified herein. shall be those specified in method 5005 of HIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through 4.4.5). including groups A, B, C, D, and E inspections and as specified herein except where option 2 of MIL-1-38535 permits a

40、 1 ternate in- 1 i ne control testing . Quality conformance inspection for device classes B and S shall Inspections to be performed for device classes H, B, and S Technology conformance inspection for classes Q and V shall be in accordance with NIL-1-38535 4.4.1 Group A inspection. a. b. Tests shall

41、 be as specified in table II herein. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the instruction set. classes B and S, subgroups 7 and 8 tests shall be sufficient to verify the truth table as approved by the qualifying activity. F4r device classes Q and V, subgroups 7 a

42、nd 8 shall include verifying the functionality of the device; these tests shall have been fault graded in accordance with MIL-STD-883, test method 5012 (see 1.5 herein). For device c. Subgroup 4 (CI“ CqT, measurement) shall be measured only for the inital test and after process or design c anges whi

43、ch may affect capacitance. Capacitance shall be measured between the designated terminal and GND at a frequency of 1 NHz. Sample size is five devices with no failures. All input and output terminals shall be tested. 4.4.2 Grwp B inspection. The group B inspection end-point electrical parameters shal

44、l be as specified in table II herein. For device class S steady-state life tests, the test circuit shall be submitted to the qualifying activity. 4.4.3 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table II herein. 4.4.3.1 Additional criteria for

45、 device classes M and B. Steady-state life test conditions, method 1005 of HIL-STD-883: I a. Test condition A or D. For device class N, the test circuit shall be mintained by the manufacturer under document revision level control and shall be made available to the preparing or acquiring activity upo

46、n request. For device class 8, the test circuit shall be submitted to the qualifying activity. classes M and 8, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005. For device b. TA = +125C, min

47、imum. c. d. Test duration: Devices selected for testing shall be programed with a random 50% pattern. the devices shall be erased and verified. 4.4.3.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature, or approved alternatives s

48、hall be as specified in the device manufacturers Qf4 plan in accordance manufacturers TRB in accordance with MIL-1-38535 and shall be de available to the acquiring or preparing activity upon rquest. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in

49、accordance with the intent specified in test method 1005. 1,ooO hours, except as perritted by method 1005 of HIL-STD-883. After colpletion of all testing, I with HIL-1-38535. The test circuit shall be maintained under document revision level control by the device 4.4.4 GPWP D inspection. The group D inspection end-point electrical parameters shall be as specified in table II herein. I Provided by IHSNot for ResaleNo reproduction or networking permitted without li