DLA SMD-5962-89943 REV B-2011 MICROCIRCUITS MEMORY DIGITAL CMOS 4K X 9 PARALLEL-SERIAL FIFO MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Add device type 05. Update boilerplate. Make corrections to figure 4. Editorial changes throughout. 94-06-22 M.A. Frye B Update body of drawing to reflect current requirements. glg 11-04-01 Charles Saffle THE ORIGINAL FIRST SHEET OF THIS DRAWING

2、HAS BEEN REPLACED. REV B B B B SHEET 35 36 37 38 REV B B B B B B B B B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice DLA LAND AND MA

3、RITIME STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles Reusing COLUMBUS, OHIO 43218-3990http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye MICROCIRCUITS, MEMORY, DIGITAL, CMOS, 4K X 9 PARALLEL-SERIAL FIFO, MONOLITHIC SILICON AND AGENCIES OF THE D

4、EPARTMENT OF DEFENSE DRAWING APPROVAL DATE 90-05-12 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89943 SHEET 1 OF 38 DSCC FORM 2233 APR 97 5962-E278-11 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHSSTANDARD MICROCIRCUIT DRAWING SIZE A 5962-899

5、43 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number

6、 (PIN). The complete PIN is as shown in the following example: 5962-89943 01 Q X Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Shift R

7、ate 01 72104L 4K X 9-bit parallel-serial FIFO 120 ns 02 72104L 4K X 9-bit parallel-serial FIFO 80 ns 03 72104L 4K X 9-bit parallel-serial FIFO 65 ns 04 72104L 4K X 9-bit parallel-serial FIFO 50 ns 05 72104L 4K X 9-bit parallel-serial FIFO 40 ns 1.2.2 Case outline(s). The case outline(s) are as desig

8、nated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style Q GDIP1-T40 or CDIP2-T40 40 Dual-in-line X CQCC1-N44 44 Square leadless chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum ratings. Term

9、inal voltage with respect to ground . -0.5 V dc to +7.0 V dc DC output current . 50 mA Storage temperature range . -65C to +150C Maximum power dissipation . 1.0 W Lead temperature (soldering, 10 seconds) . +260C Thermal resistance, junction to case(JC): See MIL-STD-1835 Junction temperature (TJ) . +

10、150C 1/ 1.4 Recommended operating conditions. Supply voltage range(VCC) . +4.5 V dc to +5.5 V dc Input high voltage (VIH) . 2.2 V dc minimum Input low voltage (VIL) . 0.8 V dc maximum 2/ Case operating temperature range (TC) -55C to +125C. 1/ Maximum junction temperature may be increased to +175C du

11、ring burn-in and steady-state life tests. 2/ 1.5 V undershoots are allowed for 10 ns once per cycle. Provided by IHSNot for Resale-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89943 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENT

12、S 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE

13、 SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of

14、 Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at https:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of prec

15、edence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requir

16、ements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manufacturer or a manufacturer wh

17、o has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Management (QM) plan may make modifi

18、cations to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when the QML flow option is used

19、. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Terminal connections. The terminal connections shall be as specified on figure 1. 3.2.2 Truth table. The truth table shall be as

20、 specified on figure 2. 3.2.3 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in table I and shall apply over the full case operating

21、temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. Provided by IHSNot for Resale-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89943 DLA LAND AND MARITIME

22、 COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions Device Group A Limits Unit -55C VIH All 1,2,3 -10 10 A Output low voltage VOLVCC= 4.5 V, SO, IOUT= 16 mA All 1,2,3 0.4 V VIL= 0.8 V, VIH= 2.2 V All other

23、outputs, 0.4 IOUT= 8.0 mA Output high voltage VOHVCC= 4.5 V, SO, All 1,2,3 2.4 V VIL= 0.8 V, IOUT= -8.0 mA VIH= 2.2 V All other outputs, 2.4 IOUT= -2.0 mA Power supply current ICC1f = fS, outputs open, VCC= 5.5 V All 1,2,3 160 mA Average standby current ICC2R = W = RS = FL/RT = VIH, All 1,2,3 25 mA

24、outputs open Power down current ICC3RS = FL/RT = W = R = All 1,2,3 4.0 mA VCC- 0.2 V, all other inputs VCC- 0.2 V or 0.2 V, outputs open Input capacitance 1/ CINVI= 0 V, f = 1.0 MHz, All 4 10 pF TA= +25C, see 4.3.1c Output capacitance 1/ COUTVO= 0 V, f = 1.0 MHz, All 4 12 pF TA= +25C, see 4.3.1c Fun

25、ctional tests see 4.3.1d All 7, 8A, 8B See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHSSTANDARD MICROCIRCUIT DRAWING SIZE A 5962-89943 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 A

26、PR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions Device Group A Limits Unit -55C TC +125C type subgroups VSS= 0 V, 4.5 V VCC 5.5 V Min Max unless otherwise specified Parallel I/O shift frequency fSCL= 30 pF, see figures 3 and 4 01 9,10,11 7.0 MHz 02 10 03 12.

27、5 04 15 05 20 Serial-out shift frequency fSOCP 01 9,10,11 25 MHz 02 28 03 33 04 40 05 50 Serial-in shift frequency fSICP 01 9,10,11 25 MHz 02 28 03 33 04 40 05 50 PARALLEL OUTPUT MODE TIMINGS Access time tACL= 30 pF, see figures 3 and 4 01 9,10,11 120 ns 02 80 03 65 04 50 05 40 See footnotes at end

28、of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHSSTANDARD MICROCIRCUIT DRAWING SIZE A 5962-89943 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - cont

29、inued. Test Symbol Conditions Device Group A Limits Unit -55C TC +125C type subgroups VSS= 0 V, 4.5 V VCC 5.5 V Min Max unless otherwise specified PARALLEL OUTPUT MODE TIMINGS continued. Read recovery time tRR 01,02 9,10,11 20 ns CL= 30 pF, see figures 3 and 4 03,04 15 05 10 Read pulse width tRPW 01

30、 9,10,11 120 ns 02 80 03 65 04 50 05 40 Read cycle time tRC 01 9,10,11 140 ns 02 100 03 80 04 65 05 50 Write pulse low to data tWLZ 01,02 9,10,11 20 ns bus at low Z 2/ 03,04 15 05 5 Read pulse low to data tRLZ 01,02, 9,10,11 10 ns bus at low Z 2/ 03,04 05 5 Read pulse high to data tRHZ 01,02 9,10,11

31、 35 ns bus at high Z 2/ 03,04 30 05 25 Data valid from read tDV All 9,10,11 5.0 ns pulse high See footnotes at end of table. Provided by IHSNot for Resale-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89943 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 9

32、7 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions Device Group A Limits Unit -55C TC +125C type subgroups VSS= 0 V, 4.5 V VCC 5.5 V Min Max unless otherwise specified PARALLEL INPUT MODE TIMINGS Data setup time tDSCL= 30 pF, see figures 3 and 4 01,02 9,10,11 40 ns

33、 03,04 30 05 20 Data hold time tDH 01,02, 9,10,11 10 ns 03 04 5.0 05 0 Write cycle time tWC 01 9,10,11 140 ns 02 100 03 80 04 65 05 50 Write pulse width tWPW 01 9,10,11 120 ns 02 80 03 65 04 50 05 40 Write recovery time tWR 01,02 9,10,11 20 ns 03,04 15 05 10 See footnotes at end of table. Provided b

34、y IHSNot for Resale-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89943 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - continued. Test Symbol Conditions Device Group A Limits Unit -55C TC +125C type sub

35、groups VSS= 0 V, 4.5 V VCC 5.5 V Min Max unless otherwise specified RESET TIMINGS Reset cycle time tRSCCL= 30 pF, see figures 3 and 4 01 9,10,11 140 ns 02 100 03 80 04 65 05 50 Reset pulse width tRS 01 9,10,11 120 ns 02 80 03 65 04 50 05 40 Reset setup time tRSS 01 9,10,11 120 ns 02 80 03 65 04 50 0

36、5 40 Reset recovery time tRSR 01,02 9,10,11 20 ns 03,04 15 05 10 See footnotes at end of table. Provided by IHSNot for Resale-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89943 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 9 DSCC FORM 2234 APR 97 TABLE I. Electrical perform

37、ance characteristics - continued. Test Symbol Conditions Device Group A Limits Unit -55C TC +125C type subgroups VSS= 0 V, 4.5 V VCC 5.5 V Min Max unless otherwise specified RESET TO FLAGS DELAYS Reset to EF, AEF, and tRSF1CL= 30 pF, see figures 3 and 4 01 9,10,11 140 ns EF+1 low 02 100 03 80 04 65 05 50 Reset to HF, FF, and FF-1 tRSF2 01 9,10,11 140 ns high 02 100 03 80 04 65 05 50 RESET TO TIME DELAYED OUTPUTS - SERIAL MODE ONLY Reset going low to tRSQ