DLA SMD-5962-89839 REV F-2007 MICROCIRCUIT MEMORY DIGITAL EE PROGRAMMABLE ARRAY LOGIC MONOLITHIC SILICON《硅单片 EE可编程逻辑阵列 数字记忆微型电路》.pdf

《DLA SMD-5962-89839 REV F-2007 MICROCIRCUIT MEMORY DIGITAL EE PROGRAMMABLE ARRAY LOGIC MONOLITHIC SILICON《硅单片 EE可编程逻辑阵列 数字记忆微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-89839 REV F-2007 MICROCIRCUIT MEMORY DIGITAL EE PROGRAMMABLE ARRAY LOGIC MONOLITHIC SILICON《硅单片 EE可编程逻辑阵列 数字记忆微型电路》.pdf（15页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Updated document. Added three device types 04, 05, and 06. Added S package. Added two vendors. Editorial changes throughout. 91-08-23 M. A. Frye B Update boilerplate. Add device type 07 for vendor 66675. Editorial changes throughout. 94-07-12 M.

2、A. Frye C Add device types 08 through 10. Update boilerplate. Editorial changes throughout. 95-05-12 M. A. Frye D Add device types 11 through 14. Update boilerplate. ksr 98-12-04 Raymond Monnin E Lower tPDand tCOminimum value by 1 ns for devices 01, 02, and 03. ksr 99-08-04 Raymond Monnin F Boilerpl

3、ate update, part of 5 year review. ksr 07-04-24 Robert M. Heber THE ORIGINAL FIRST PAGE HAS BEEN REPLACED REV SHET REV SHET REV STATUS REV F F F F F F F F F F F F F OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 PMIC N/A PREPARED BY Kenneth S. Rice DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT

4、 DRAWING CHECKED BY Wm J. Johnson COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Michael A. Frye AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 89-12-18 MICROCIRCUIT, MEMORY, DIGITAL, EE PROGRAMMABLE ARRAY LOGIC, MON

5、OLITHIC SILICON AMSC N/A REVISION LEVEL F SIZE A CAGE CODE 67268 5962-89839 SHEET 1 OF 13 DSCC FORM 2233 APR 97 5962-E314-07 .Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89839 DEFENSE SUPPLY CENTER COLUMB

6、US COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describes device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete P

7、IN is as shown in the following example: 5962-89839 01 R A Drawing number Device type (see 1.2.1) Case outline(see 1.2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function Access time current 01 16V8 1

8、6-input, 8-output, EECMOS, architecturally 30 130 generic, programmable AND-OR array 02 16V8 16-input, 8-output, EECMOS, architecturally 20 130 generic, programmable AND-OR array 03 16V8 16-input, 8-output, EECMOS, architecturally 15 130 generic, programmable AND-OR array 04, 11 16V8 16-input, 8-out

9、put, EECMOS, architecturally 10 130 generic, programmable AND-OR array 05 16V8 16-input, 8-output, EECMOS, architecturally 25 65 generic, programmable AND-OR array 06 16V8 16-input, 8-output, EECMOS, architecturally 20 65 generic, programmable AND-OR array 07 16V8 16-input, 8-output, EECMOS, archite

10、cturally 7.5 130 generic, programmable AND-OR array 08, 12 16V8 16-input, 8-output, EECMOS, architecturally 25 65 generic, programmable AND-OR array 09, 13 16V8 16-input, 8-output, EECMOS, architecturally 15 130 generic, programmable AND-OR array 10, 14 16V8 16-input, 8-output, EECMOS, architectural

11、ly 15 65 generic, programmable AND-OR array 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line S GDFP2-F20 or CDFP3-F20 20 Flat package 2 CQCC1-N20 20 Squa

12、re chip carrier package 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89839 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 432

13、18-3990 REVISION LEVEL F SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. Supply voltage range . -0.5 V dc to +7.0 V dc Input voltage range applied -2.5 V dc to VCC+ 1.0 V dc 1/ Off-state output voltage range applied . -2.5 V dc to VCC+ 1.0 V dc 1/ Storage temperature range -65C to +150C

14、Maximum power dissipation (PD) 2/. 1.5 W Lead temperature (soldering, 10 seconds). +260C Thermal resistance, junction-to-case (JC) See MIL-STD-1835 Junction temperature (TJ). +175C Data retention 10 years (minimum) Endurance 100 erase/write cycles (minimum) 1.4 Recommended operating conditions. Supp

15、ly voltage range (VCC). 4.5 V dc to 5.5 V dc High level input voltage range (VIH). 2.0 V dc to VCC+ 1.0 V dc Low level input voltage range (VIL) VSS-0.5 V dc to +0.8 V dc High level output current (IOH) -2.0 mA maximum Low level output current (IOL) 12 mA maximum Case operating temperature range (TC

16、) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitat

17、ion or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DE

18、FENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Av

19、enue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a spe

20、cific exemption has been obtained. 1 Minimum input voltage is -0.5 V dc which may undershoot to -2.5 V dc for pulses less than 20 ns. 2/ Must withstand the added PDdue to short circuit test (e.g., ISC). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,

21、-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89839 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 4 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions Device Group A Limits Unit -55C TC +125C type sub- VSS= 0 V, 4.5 V VCC 5.5

22、V groups Min Max unless otherwise specified Input leakage current ILX0.0 V VIN VCC 01-03, 1,2,3 -10 10 A 05,06 04, -100 10 07-14 Bidirectional pin II/O/Q0.0 V VI/O/Q VCC 01-03, 1,2,3 -10 10 A leakage current 05,06 04, -100 10 07-14 Output low voltage VOLVCC= 4.5 V, IOL= 12 mA, All 1,2,3 0.5 V VIN= V

23、IHor VIL Output high voltage VOHVCC= 4.5 V, IOH= -2.0 mA, All 1,2,3 2.4 V VIN= VIHor VIL Input low voltage 1/ VIL All 1,2,3 VSS 0.8 V -0.5 Input high voltage 1/ VIH All 1,2,3 2.0 VCC V +1.0 01-04, Operating power ICCVIL= 0.5 V, VIH= 3.0 V, 07,09, 1,2,3 130 mA supply current 2/ ftog= 25 MHz 11,13 05,

24、06, 08,10, 65 12,14 Output short circuit IOSVCC= 5.0 V, VOUT= 0.5 V, All 1 -30 -150 mA current 3/ TA= +25C, see 4.3.1d Input capacitance CINVCC= 5.0 V, VI= 2.0 V, All 4 10 pF f = 1.0 MHz, TA= +25C, see 4.3.1c Bidirectional pin CI/O/QVCC= 5.0 V, VI/O/Q= 2.0 V, All 4 10 pF capacitance f = 1.0 MHz, TA=

25、 +25C, see 4.3.1c Functional tests See 4.3.1e All 7,8A,8B See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89839 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION

26、 LEVEL F SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Conditions Test Symbol -55C TC +125C Device Group A Limits Unit VSS= 0 V, 4.5 V VCC 5.5 V type sub- unless otherwise specified groups Min Max Input or feedback to tPDVCC= 4.5 V, see figures 01 9,10,11

27、 2.0 30 ns nonregistered output 3 and 4 4/ 02 2.0 20 06 3.0 20 03 2.0 15 09,10, 13,14 3.0 15 04 2.0 10 05,08, 3.0 25 12 07 1.0 7.5 11 3.0 10.0 Clock to output delay tCO 01 9,10,11 1.0 20 ns 5/ 02 1.0 15 06 2.0 15 03 1.0 12 09,10,12 2.0 12 04 1.0 7.0 13,14 2.0 10.0 05,08 2.0 15 07 1.0 6 11 2.0 7.0 In

28、put to output enable tEA1 01 9,10,11 30 ns 02,06 20 03,09, 15 10,13,14 04,11 10 05,08, 25 12 07 9.0 Input to output register tEA2 01,08 9,10,11 25 ns enable 5/ 02,06 18 03,09, 15 10,13,14 04,11 10 05,12 20 07 7.0 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networki

29、ng permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89839 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions Device Group A Limits

30、Unit -55C TC +125C type sub- VSS= 0 V, 4.5 V VCC 5.5 V groups Min Max unless otherwise specified Input to output disable 6/ tER1VCC= 4.5 V, see figures 01 9,10,11 30 ns 3 and 4 4/ 02,06 20 03,09, 15 10,13,14 04,11 10 05,08, 25 12 07 7.0 Input to output register tER2 01,08 9,10,11 25 ns disable 5/ 6/

31、 02,06 18 03,09, 15 10,13,14 04,11 10 05,12 20 07 7.0 Clock frequency without fCLK1 01 9,10,11 0.0 33.3 MHz feedback 5/ 7/ 12 0.0 37.0 02,06 0.0 41.6 13,14 0.0 45.5 03,09, 0.0 50.0 10 04 0.0 62.5 11 0.0 58.0 05,08 0.0 33.3 07 0.0 100.0 Clock frequency with fCLK2 01 9,10,11 0.0 22.2 MHz feedback 5/ 0

32、2,06 0.0 33.3 12 0.0 40.0 03,09, 0.0 41.6 10 04 0.0 58.5 13,14 0.0 50.0 05,08 0.0 28.5 11 0.0 62.5 07 0.0 76.9 See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89839 DEFENSE SUPP

33、LY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions Device Group A Limits Unit -55C TC +125C type sub- VSS= 0 V, 4.5 V VCC 5.5 V groups Min Max unless otherwise specified Input

34、 or feedback setup tSVCC= 4.5 V, see figures 01 9,10,11 25 ns time, before rising 3 and 4 4/ 02,06, 15 clock 5/ 12 03,09, 12 10,13,14 04,11 10 05,08 20 07 7.0 Input or feedback hold time tH 01 - 10 9,10,11 0 ns after rising clock 5/ 11 - 14 0.5 Clock pulse width, high 5/ tPWH 01 9,10,11 15 ns 02,06,

35、 12 12 03,09, 10 10 04,13,14 8.0 05,08 15 07 5.0 11 6.0 Clock pulse width, low 5/ tPWL 01 9,10,11 15 ns 02,06, 12 12 03,09, 10 10 04,13, 8.0 14 05,08 15 07 5.0 11 6.0 1/ These are absolute values with respect to device ground, and all overshoots due to system or tester noise are included. 2/ This pa

36、rameter may be tested at a frequency other than 25MHz, but shall be guaranteed to the specified limits at 25MHz. 3/ Not more than one output at a time should be shorted. Short circuit test duration should not exceed 1 second (see 4.3.1d). 4/ AC tests are performed with input rise and fall times (10

37、percent to 90 percent) of 3.0 ns, timing reference levels of 1.5 V, input pulse levels of 0 to 3.0 V and the output load of figure 3. Input pulse levels are absolute values with respect to device ground, and all overshoots due to system or tester noise are included. 5/ Test applies only to registere

38、d outputs. 6/ Transition is measured at steady-state high level -500 mV or steady-state low level +500 mV on the output from the 1.5 V level on the input. 7/ Tested initially and after any design or process changes that affect that parameter, and therefore shall be guaranteed to the limits specified

39、 in table I. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89839 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL F SHEET 8 DSCC FORM 2234 APR 97 Device types All Case outlines R, S, 2 Terminal number Terminal symbol 1 I/CLK