DLA SMD-5962-89509 REV B-2008 MICROCIRCUIT HYBRID LINEAR CMOS TRIPLE 8-BIT COLOR MAPPED VIDEO DAC.pdf

《DLA SMD-5962-89509 REV B-2008 MICROCIRCUIT HYBRID LINEAR CMOS TRIPLE 8-BIT COLOR MAPPED VIDEO DAC.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-89509 REV B-2008 MICROCIRCUIT HYBRID LINEAR CMOS TRIPLE 8-BIT COLOR MAPPED VIDEO DAC.pdf（15页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Figure 2, terminal connections, correct terminal symbols for terminal numbers 8 and 12 through 14. Update drawing boilerplate. 02-04-09 Raymond Monnin B Update drawing. -gz 08-06-06 Robert M. Heber THE ORIGINAL FIRST SHEET OF THIS DRAWING HAS BEE

2、N REPLACED. REV SHEET REV SHEET REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Donald R. Osborne DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Robert M. Heber COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil

3、THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY William K. Heckman MICROCIRCUIT, HYBRID, LINEAR, CMOS, TRIPLE, 8-BIT, COLOR MAPPED VIDEO DAC AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 90-08-21 AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-89509 SHEET 1 O

4、F 14 DSCC FORM 2233 APR 97 5962-E241-08 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89509 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1

5、.1 Scope. This drawing describes device requirements for class H hybrid microcircuits to be processed in accordance with MIL-PRF-38534 and a choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). 1.2 PIN. The PIN shall be as shown in the fo

6、llowing example: 5962-89509 01 X X Drawing number Device type Case outline Lead finish (see 1.2.1) (see 1.2.2) (see 1.2.3) 1.2.1 Device type(s). The device type(s) shall identify the circuit function as follows: Device type Generic number Circuit function 01 RGBDAC3808H Triple, 8-bit, color mapped v

7、ideo RAM DAC 1.2.2 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 40 Dual-in-line 1.2.3 Lead finish. The lead finish shall be as specified in MIL-PRF-38534. 1.3 Absolute maximum

8、ratings. Digital supply voltage (VS) = (VDD- DIG GND). +6.0 V dc Analog supply voltage = (VANA- ANA GND) +6.0 V dc Supply current (with 75 loads) 60 mA Full scale output current 40 mA Drive into any digital input (clamped). 10 mA Output voltage compliance range (each channel, instantaneous) -0.3 V d

9、c to +2.5 V dc Power dissipation (PD) . 3.40 W Storage temperature range -65C to +150C Lead temperature (soldering, 10 seconds) +300C Junction temperature (TJ) +150C Thermal resistance: Junction-to-case (JC). 10C/W Junction-to-ambient (JA) 36C/W 1.4 Recommended operating conditions. Digital supply v

10、oltage range (VS) = (VDD- DIG GND) +4.75 V dc to +5.25 V dc Analog supply voltage range = (VANA- ANA GND) +4.75 V dc to +5.25 V dc Output load resistance (RL) . 37.5 Ambient operating temperature range (TA) -55C to +125C Provided by IHSNot for ResaleNo reproduction or networking permitted without li

11、cense from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89509 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handb

12、ooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38534 - Hybrid Microcircuits, General Specification for. DEPARTMENT OF DEFENSE STAND

13、ARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard for Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are availa

14、ble online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this

15、drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item performance requirements for device class H shall be in accordance with MIL-PRF-38534. Com

16、pliance with MIL-PRF-38534 may include the performance of all tests herein or as designated in the device manufacturers Quality Management (QM) plan or as designated for the applicable device class. The manufacturer may eliminate, modify or optimize the tests and inspections herein, however the perf

17、ormance requirements as defined in MIL-PRF-38534 shall be met for the applicable device class. In addition, the modification in the QM plan shall not affect the form, fit, or function of the device for the applicable device class. 3.2 Design, construction, and physical dimensions. The design, constr

18、uction, and physical dimensions shall be as specified in MIL-PRF-38534 and herein. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.2 herein and figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Block diagram. The block diagra

19、m shall be as specified on figure 3. 3.2.4 Read cycle timing diagram. The read cycle timing diagram shall be as specified on figure 4. 3.2.5 Write cycle timing diagram. The write cycle timing diagram shall be as specified on figure 5. Provided by IHSNot for ResaleNo reproduction or networking permit

20、ted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89509 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance character

21、istics are as specified in table I and shall apply over the full specified operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking of devic

22、e(s). Marking of device(s) shall be in accordance with MIL-PRF-38534. The device shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers vendor similar PIN may also be marked. 3.6 Data. In addition to the general performance requirements of MIL-PRF-38534, the manufacturer o

23、f the device described herein shall maintain the electrical test data (variables format) from the initial quality conformance inspection group A lot sample, for each device type listed herein. Also, the data should include a summary of all parameters manually tested, and for those which, if any, are

24、 guaranteed. This data shall be maintained under document revision level control by the manufacturer and be made available to the preparing activity (DSCC-VA) upon request. 3.7 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to supply to this dra

25、wing. The certificate of compliance (original copy) submitted to DSCC-VA shall affirm that the manufacturers product meets the performance requirements of MIL-PRF-38534 and herein. 3.8 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38534 shall be provided with each l

26、ot of microcircuits delivered to this drawing. 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance with MIL-PRF-38534 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form,

27、 fit, or function as described herein. 4.2 Screening. Screening shall be in accordance with MIL-PRF-38534. The following additional criteria shall apply: a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition A, B, C, or D. The test circuit shall be maintained by the manufacturer under docu

28、ment revision level control and shall be made available to either DSCC-VA or the acquiring activity upon request. Also, the test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015 of MIL-STD-883. (2) TAas sp

29、ecified in accordance with table I of method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table II herein, except interim electrical parameter tests prior to burn-in are optional at the discretion of the manufacturer. Provided by IHSNot for ResaleNo r

30、eproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89509 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Limits Test Symbol Conditions -55C

31、 TA +125C VS= +5.0 V dc unless otherwise specified Group A subgroups Device type Min Max Unit ANALOG OUTPUTS 4 74.25 75.75 Output impedance ZOUTVCC= 0 V 1/ 5,6 01 73.10 76.90 Output short circuit current IOSAll bits on 1/ 2/ 1,2,3 01 17 mA OUTPUT ACCURACY 1 627.5 647.5 Video gain (absolute) AVIDAll

32、bits on 1/ 2/ 2,3 01 625.0 650.0 mV 1 5.0 Channel to channel gain error CCE All bits on 1/ 2/ 3/ 2,3 01 10 mV 1 1 Integral linearity error ILE 4/ 2,3 01 2 LSB Differential linearity DLE 5/ 1,2,3 01 1 LSB 1 1 Offset error OE All bits off 1/ 2/ 2,3 01 10 mV Blank level VBLRGB BLANK = logic 0 1/ 2/ 6/

33、1,2,3 01 -47.7 -58.3 mV Sync level VSLSYNC = logic 0 1/ (GRN OUT All bits off only) 7/ 1,2,3 01 -260 -300 mV 10% bright level VBRLANA GND = logic 0 1/ 8/ 1,2,3 01 63 77 mV DYNAMICS CHARACTERISTICS (EACH DAC) Power supply rejection ratio PSRR Variation in power 1/ supply = 5% 1,2,3 01 0.2 %/% Settlin

34、g time tSET1To 1 LSB 1/ 9/ 10/ 9,10,11 01 10 s See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89509 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SH

35、EET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions -55C TA +125C VS= +5.0 V dc unless otherwise specified Group A subgroups Device type Min Max Unit DYNAMICS CHARACTERISTICS (EACH DAC) - Continued. Update rate fUDR2See figure 4 1/ 9

36、/ 10/ 9,10,11 01 40 MHz Rise time tr10% to 90% 1/ 9/ 10/ 9,10,11 01 5.0 ns Slew rate SR 63.75 mV steps, 10% to 90% 1/ 10/ 9,10,11 01 100 V/s STROBE Setup time tS1See figure 4 1/ 9/ 9,10,11 01 35 ns Update rate tUDR2See figure 4 1/ 9/ 9,10,11 01 25 ns Propagation delay time tPD1See figure 4 1/ 9/ 9,1

37、0,11 01 20 ns Pulse width tPWSee figure 4 1/ 9/ 9,10,11 01 10 ns COMPOSITE BLANKING, SYNCHRONOUS Settling time tSET2To 1.0 LSB 1/ 10/ 9,10,11 01 10 ns Setup time tS2To 1.0 LSB 1/ 10/ 9,10,11 01 10 ns Propagation delay time tPD2To 1.0 LSB 1/ 10/ 9,10,11 01 20 ns DYNAMIC CHARACTETRISTICS (EACH RAM) 11

38、/ Write pulse width tww9,10,11 01 20 Address before write pulse tsa9,10,11 01 0 Data setup time tsd9,10,11 01 20 Chip select setup time tsb See figure 5 9,10,11 01 0 20 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,

39、-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89509 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Limits Test Symbol Conditions -55C TA +125C VS= +5.0 V dc unless otherwise specified G

40、roup A subgroups Device type Min Max Unit DYNAMIC CHARACTETRISTICS (EACH RAM) 11/ - Continued. Address hold time ths9,10,11 01 0 Data hold time thd9,10,11 01 0 Chip select setup time thbSee figure 5 9,10,11 01 25 Address access time taa 9,10,11 01 25 Chip select access time (with valid address) tab

41、See figure 4 9,10,11 01 100 ns TOTAL DEVICE Supply current ISAll bits on 1/ 2/ 12/ 1,2,3 01 680 mA 1/ Measured from ANA GND to each output (RED OUT, GRN OUT, BLU OUT). 2/ Conditions are defined as follows: D0 to D7 logic “1“ = 2.0 V dc to 5.0 V dc), all bits on. D0 to D7 logic “0“ = (0.0 V dc to 0.8

42、 V dc) all bits off. CBS = logic “0“. A0 to A7 = logic “1“. CSG, CSR, and WE = logic “0“. No connection pins = not used. VANAand VDD= +5.0 V dc. ANA GND and DIG GND = 0 V dc. RED OUT, GRN OUT, and BLU OUT = 75 to ANA GND. SYNC ADJ = N/C. STROBE = 100 kHz to 40 MHz TTL clock, 40% to 60% duty cycle. A

43、ll others = logic “1“. 3/ The absolute value of the maximum difference between any of the three outputs. 4/ Integral nonlinearity is a measure of the maximum deviation from a straight line passing through the end-points of the transfer function. 5/ Differential linearity is a measure of the differen

44、ce between adjacent codes. 6/ The difference between the actual value read for offset error and the voltage read with RGB BLANK = logic “0“. 7/ The difference between the actual value read for offset error and the voltage read with SYNC = logic “0“. 8/ The difference between the actual voltage read

45、for video gain (absolute) and the voltage read with 10% RED BRIGHT, 10% GRN BRIGHT, and 10% BLU BRIGHT = logic “0“. 9/ Condition in accordance with figure 4. Address (1) and address (2) are first programmed with D0 to D7 = logic “1“, address (2) and address (4) are programmed with D0 to D7 = logic “

46、0“ in accordance with figure 5. 10/ STORBE = 80 kHz to 120 kHz TTL clock, 40 % to 60 % duty cycle. 11/ This test series is performed by programming in accordance figure 5 and testing under DYNAMIC CHARACTERISTICS and STROBE. This section represents the conditions used for all tests performed using f

47、igure 5. No data will be recorded for the section. 12/ Includes total current to VANAand VDD(pins 24 and 40). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-89509 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHI

48、O 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 Case outline X. Inches mm 2.095 53.21 1.900 48.26 .790 20.07 .600 15.24 .155 3.94 .150 3.81 .100 2.54 .095 2.41 .050 1.27 .040 1.02 .030 0.76 .025 0.64 NOTES: .021 0.53 1. Dimensions are in inches. .018 0.46 2. Metric equivalents are given for general information only. .010 0.25 .008 0.20 .005 0.13 .003 0.08 .002 0.05 .001 0.03 FIGURE 1. Case outline. Provided by IHSNot for ResaleNo reproduction or networking permitted with