DLA SMD-5962-86714 REV C-2009 MICROCIRCUIT DIGITAL BIPOLAR QUAD BUS TRANSCEIVER MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change VOL2, 0.5 V from min to max column. Change I01test conditions: VCCfrom 4.5 V to 5.5 V. Correct truth table input heading from A1to Ai. Change vendor part number on page 12. Editorial changes throughout.87-01-15 Charles Reusing B Update to

2、reflect latest changes in format and requirements. Editorial changes throughout. -les 02-06-10 Raymond Monnin C Update drawing to current requirements. Editorial changes throughout. - gap 09-05-20 Joseph D. Rodenbeck Current CAGE code is 67268 The original first sheet of this drawing has been replac

3、ed. REV SHET REV SHET REV STATUS REV C C C C C C C C C C C C OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 PMIC N/A PREPARED BY David W. Queenan DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil STANDARD MICROCIRCUIT DRAWING THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTM

4、ENTS AND AGENCIES OF THE DEPARTMENT OF DEFENSE CHECKED BY D. A. DiCenzo APPROVED BY N. A. Hauck MICROCIRCUIT, DIGITAL, BIPOLAR, QUAD BUS TRANSCEIVER, MONOLITHIC SILICON DRAWING APPROVAL DATE 86-10-01 AMSC N/A REVISION LEVEL C SIZE A CAGE CODE 14933 5962-86714 SHEET 1 OF 12 DSCC FORM 2233 APR 97 5962

5、-E119-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86714 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing describe

6、s device requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. 1.2 Part or Identifying Number (PIN). The complete PIN is as shown in the following example: 5962-86714 01 R X Drawing number Device type (see 1.2.1) Case outline(see 1.

7、2.2) Lead finish(see 1.2.3)1.2.1 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 2917A Quad three-state bus transceiver with interface logic 1.2.2 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as

8、 follows: Outline letter Descriptive designator Terminals Package style R GDIP1-T20 or CDIP2-T20 20 Dual-in-line package S GDFP2-F20 or CDFP3-F20 20 Flat package 2 CQCC1-N20 20 Square chip carrier 1.2.3 Lead finish. The lead finish is as specified in MIL-PRF-38535, appendix A. 1.3 Absolute maximum r

9、atings. Supply voltage . -0.5 V dc to +7.0 V dc Input voltage range -1.5 V dc to +7.0 V dc Storage temperature range -65C to +150C Maximum power dissipation (PD) 1/ 1.24 W Lead temperature (soldering, 10 seconds) +300C Thermal resistance, junction-to-case (JC): See MIL-STD-1835 Junction temperature

10、(TJ) +150C DC input current -30 mA to +5.0 mA DC output current, into outputs (except bus) . -30 mA DC output current, into bus 100 mA 1.4 Recommended operating conditions. Supply voltage range (VCC) +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) . 2.0 V dc Maximum low level input vol

11、tage (VIL) . 0.7 V dc Case operating temperature range (TC) -55C to +125C Clock pulse width (high) 20 ns minimum Setup time, A data inputs 15 ns minimum Hold time, A data inputs . 8 ns minimum Setup time, bus to latch enable . 15 ns minimum Hold time, bus to latch enable . 6 ns minimum _ 1/ Must wit

12、hstand the added PDdue to short circuit test (e.g. IOS). Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86714 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 3 DSCC FORM 2234

13、APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or co

14、ntract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HAN

15、DBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19

16、111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3.

17、REQUIREMENTS 3.1 Item requirements. The individual item requirements shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. Product built to this drawing that is produced by a Qualified Manufacturer Listing (QML) certified and qualified manuf

18、acturer or a manufacturer who has been granted transitional certification to MIL-PRF-38535 may be processed as QML product in accordance with the manufacturers approved program plan and qualifying activity approval in accordance with MIL-PRF-38535. This QML flow as documented in the Quality Manageme

19、nt (QM) plan may make modifications to the requirements herein. These modifications shall not affect form, fit, or function of the device. These modifications shall not affect the PIN as described herein. A “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 is required to identify when

20、 the QML flow option is used. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535, appendix A and herein. 3.2.1 Case outlines. The case outlines shall be in accordance with 1.2.2 herein. 3.2.2 Terminal connection

21、s. The terminal connections shall be as specified on figure 1. 3.2.3 Truth table. The truth table shall be as specified on figure 2. 3.2.4 Logic diagram. The logic diagram shall be as specified on figure 3. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS

22、-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86714 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 4 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance characteristics are as specified in t

23、able I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are described in table I. 3.5 Marking. Marking shall be in accordance with MI

24、L-PRF-38535, appendix A. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on

25、the device. 3.5.1 Certification/compliance mark. A compliance indicator “C” shall be marked on all non-JAN devices built in compliance to MIL-PRF-38535, appendix A. The compliance indicator “C” shall be replaced with a “Q“ or “QML“ certification mark in accordance with MIL-PRF-38535 to identify when

26、 the QML flow option is used. 3.6 Certificate of compliance. A certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved so

27、urce of supply shall affirm that the manufacturers product meets the requirements of MIL-PRF-38535, appendix A and the requirements herein. 3.7 Certificate of conformance. A certificate of conformance as required in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered

28、 to this drawing. 3.8 Notification of change. Notification of change to DSCC-VA shall be required for any change that affects this drawing. 3.9 Verification and review. DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required docume

29、ntation. Offshore documentation shall be made available onshore at the option of the reviewer. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86714 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 RE

30、VISION LEVEL C SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions -55C TC+125C Group A subgroups Limits Unit unless otherwise specified Min Max Bus low level output voltage VOL1 VCC= 4.5 V, VIN= 0.7 V or 2.0 V IOL= 24 mA 1, 2, 3 0.4 V OL= 48 mA 1, 2

31、, 3 0.5 V Receiver low level output voltage VOL2 VCC= 4.5 V, VIN= 0.7 V or 2.0 V, IOL= 4.0 mA 1, 2, 3 0.4 V BE = 2.4 V IOL= 8.0 mA 1, 2, 3 0.45 V OL= 12.0 mA 1, 2, 3 0.5 V Bus high level output voltage VOH1VCC= 4.5 V, VIN= 0.7 V or 2.0 V, IOH= -15 mA 1, 2, 3 2.4 V Receiver high level output voltage

32、VOH2 VCC= 4.5 V, VIN= 0.7 V or 2.0 V, BE = 2.4 V IOH= -1.0 mA 1, 2, 3 2.4 V CC= 5.0 V, IOH= -100 A 1, 2, 3 3.5 V Parity high level output voltage VOH3 VCC = 4.5 V, IOH = -660 A, VIN= 7.0 V or 2.0 V 1, 2, 3 2.5 V Bus leakage current (high impedance) IO1VCC= 4.5 V, Bus enable = 2.4 V VOUT= 0.4 V 1, 2,

33、 3 -200 A VOUT= 2.4 V 1, 2, 3 50 A VOUT= 4.5 V 1, 2, 3 100 A Bus leakage current (power off) IO2VCC= 0 V, VOUT= 4.5 V 1, 2, 3 -15 100 A See footnote at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A

34、 5962-86714 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions -55C TC+125C Group A subgroups Limits Unit unless otherwise specified Min Max Short-circuit output c

35、urrent IOS1 VCC= 5.5 V, VOUT= 0 V 1/ Bus 1, 2, 3 -50 -225 mA IOS2 Receiver 1, 2, 3 -130 -130 mA OS3 Parity 1, 2, 3 -20 -100 mA Input clamp voltage VICVCC= 4.5 V, IIN= -18 mA 1, 2, 3 -1.2 V Low level input current II L VCC= 5.5 V, VIN= 0.4 V BE , RLE 1, 2, 3 -0.72 mA All other inputs 1, 2, 3 -0.36 mA

36、 High level input current II H1 VCC= 5.5 V, VIN= 2.7 V 1, 2, 3 20 A II H2 VCC= 5.5 V, VIN= 7.0 V 1, 2, 3 100 A Supply current ICC VCC= 5.5 V 1, 2, 3 95 mA Off-state output current (receiver) IOFF VCC= 5.5 V VOUT= 2.4 V 1, 2, 3 50 A VOUT= 0.4 V 1, 2, 3 -50 A Functional tests See 4.3.1c 7, 8 Propagati

37、on delay time, driver clock (DRCP) to bus tPLH1 VCC = 5.0 V 10% CL= 50 pF 10% 9, 10, 11 36 ns tPHL1 RL1 = 1 k 5% RL2= 130 5% 9, 10, 11 36 ns Propagation delay time, bus to receiver output tPLH2 VCC = 5.0 V 10% CL= 15 pF 10% 9, 10, 11 33 ns (latch enabled) tPHL2 RL1 = 5 k 5% RL2= 2 k 5% 9, 10, 11 30

38、ns See footnote at end of table Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86714 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrica

39、l performance characteristics - Continued. Test Symbol Conditions -55C TC+125C Group A subgroups Limits Unit unless otherwise specified Min Max Propagation delay time, latch enable to receiver tPLH3 VCC = 5.0 V 10% CL= 50 pF 10% 9, 10, 11 33 ns output tPHL3 RL1 = 1.0 k 5% RL2= 130 5% 9, 10, 11 30 ns

40、 Propagation delay time, A data to odd parity out tPLH4 9, 10, 11 46 ns (driver enabled) tPHL4 9, 10, 11 40 ns Propagation delay time, bus to odd parity out tPLH5 9, 10, 11 36 ns (driver inhibit) tPHL5 9, 10, 11 36 ns Propagation delay time, latch enable to odd tPLH6 9, 10, 11 36 ns parity output tP

41、HL6 9, 10, 11 36 ns Propagation delay time, bus enable to bus tPZH1tPZL1 VCC= 5.0 V 10% CL= 50 pF 10% 9, 10, 11 26 ns tPHZ1tPZL1 RL1= 1.0 k 5% RL2= 130 5% 9, 10, 11 21 ns Propagation delay time, output control to output tPZH2tPZL2 VCC= 5.0 V 10% CL= 15 pF 10% RL1= 5 k 5% RL2= 2 k 5% 9, 10, 11 26 ns

42、tPHZ2tPZL2 VCC= 5.0 V 10% CL= 5 pF 10% RL1= 5 k 5% RL2= 2 k 5% 9, 10, 11 26 ns 1/ Not more than one output should be shorted at a time and the duration of the short circuit should not exceed one second. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,

43、-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86714 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 8 DSCC FORM 2234 APR 97 Device type 01 Case outlines R, S and 2 Terminal number Terminal symbols 1 RLE 2 R03 A04 BUS0 5 GND16 BUS1 7 A18 R19 BE10 ODD 11 OE 12 R213 A214 BU

44、S2 15 GND216 BUS3 17 A318 R319 DRCP 20 VCCFIGURE 1. Terminal connections. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86714 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET

45、9 DSCC FORM 2234 APR 97 Inputs Internal to device Bus Output AiDRCP BE RLE OE DiQiBUSi RiFunction X X H X X X X Z X Driver output disable X X X X H X X X Z Receiver output disable X X H L L X L L H Driver output disable and X X H L L X H H L receive data via bus input X X X H X X NC X X Latch receiv

46、ed data L X X X L X X X Load driver register H X X X H X X X X L X X X NC X X X No driver clock restrictions X H X X X NC X X X X X L X X L X H X Drive bus X X L X X H X L X H = HIGH Z = HIGH Impedance X = Dont care i = 0, 1, 2, 3 L = LOW NC = No change = LOW to HIGH transition BE Odd parity output

47、L ODD = A0 A1 A2 A3H ODD = Q0 Q1 Q2 Q3FIGURE 2. Truth tables. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86714 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 10 DSCC FORM

48、 2234 APR 97 FIGURE 3. Logic diagram. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-86714 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL C SHEET 11 DSCC FORM 2234 APR 97 4. VERIFICATION 4.1 Sampling and inspection. Sampling and inspection procedures shall be in accordance wit