DLA SMD-5962-07210-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 512K x 8-BIT (4M) RADIATIONHARDENED LOW VOLTAGE SRAM MONOLITHIC SILICON《硅单片512千 X 8比特低压耐辐射静态随机存储器 氧化物半导体数字微型电路》.pdf

《DLA SMD-5962-07210-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 512K x 8-BIT (4M) RADIATIONHARDENED LOW VOLTAGE SRAM MONOLITHIC SILICON《硅单片512千 X 8比特低压耐辐射静态随机存储器 氧化物半导体数字微型电路》.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-07210-2007 MICROCIRCUIT MEMORY DIGITAL CMOS 512K x 8-BIT (4M) RADIATIONHARDENED LOW VOLTAGE SRAM MONOLITHIC SILICON《硅单片512千 X 8比特低压耐辐射静态随机存储器 氧化物半导体数字微型电路》.pdf（21页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED REV SHEET REV SHEET 15 16 17 18 19 20 REV STATUS REV OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Kenneth Rice STANDARD MICROCIRCUIT DRAWING CHECKED BY Rajesh Pithadia DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-399

2、0 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY All DEPARTMENTS APPROVED BY Joseph Rodenbeck AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 07-02-16 MICROCIRCUIT, MEMORY, DIGITAL, CMOS, 512K x 8-BIT (4M), RADIATION-HARDENED, LOW VOLTAGE SRAM, MONOLITHIC SILICON AMSC N/

3、A REVISION LEVEL SIZE A CAGE CODE 67268 5962-07210 SHEET 1 OF 20 DSCC FORM 2233 APR 97 5962-E132-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07210 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-39

4、90 REVISION LEVEL SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in

5、 the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN. 1.2 PIN. The PIN shall be as shown in the following example: 5962 G 07210 01 Q X A | | | | | | | | | | | | | | | | | Federal RHA Device Device Case Lead stock class

6、designator type class outline finish designator (see 1.2.1) (see 1.2.2) designator (see 1.2.4) (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices shall meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designat

7、or. Device class M RHA marked devices meet the MIL-PRF-38535 appendix A specified RHA levels and shall be marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device types. The device types shall identify the circuit function as follows: Device type Generic number

8、 Circuit function 01 8394325-531, -534, -535 3.3V 512K X 8 radiation hardened SRAM, 30ns 02 8394325-536 3.3V 512K X 8 radiation hardened SRAM, 30ns 1.2.3 Device class designator. The device class designator shall be a single letter identifying the product assurance level as follows: Device class Dev

9、ice requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A Q, V Certification and qualification to MIL-PRF-38535 1.2.4 Case outline(s). The case outline(s) shall be as desi

10、gnated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X See figure 1 40 Flat pack 1.2.5 Lead finish. The lead finish shall be as specified in MIL-PRF-38535 for classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for Resal

11、eNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07210 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ 2/ Supply voltage range (VDD) .-0.5 V dc to +4.

12、5 V dc DC input voltage range (VIN) .-0.5 V dc to VDD+ 0.5 V dc 3/ DC output voltage range (VOUT) -0.5 V dc to VDD+ 0.5 V dc 3/ Storage temperature .-65C to +150C Case operating free-air temperature, (TC) -55C to +125C Lead temperature (soldering 5 seconds) +250C Thermal resistance, junction to case

13、 (JC) . 3.0 C/W Maximum power dissipation 1.0 W 20MHz Maximum junction temperature (TJ) 150C 1.4 Recommended operating conditions. 3/ Supply voltage range (VDD) .3.14 V dc to 3.46 V dc Supply voltage reference (GND) .0.0 V dc High level input voltage range (VIH) 2.0 V to VDDLow level input voltage r

14、ange (VIL) 0.0 V dc to 0.8 V dc Case operating free-air temperature (TC) .-55C to +125C 1.5 Digital logic testing for device classes Q and V. Fault coverage measurement of manufacturing logic tests (MIL-STD-883, test method 5012)100 percent 1.6 Radiation features Maximum total dose available (dose r

15、ate = 50-300 rads(Si)/s) . 500 KRads(Si) Single event phenomenon (SEP) effective linear energy threshold (LET) with no latchup . 120 Mev-cm2/mg Neutron irradiation 1E14 neutrons/cm24/ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the ma

16、ximum levels may degrade performance and affect reliability. 2/ All voltages are referenced to GND. 3/ Maximum applied voltage shall not exceed +4.5 V. 4/ Guaranteed but not tested. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUI

17、T DRAWING SIZE A 5962-07210 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the e

18、xtent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Met

19、hod Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps

20、.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following document(s) form a part of this document to the extent specified herein. Unless otherwise

21、specified, the issues of the documents are the issues of the documents cited in the solicitation. AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM) ASTM Standard F1192-00 - Standard Guide for the Measurement of Single Event Phenomena from Heavy Ion Irradiation of Semiconductor Devices. (Applications

22、 for copies of ASTM publications should be addressed to: ASTM International, PO Box C700, 100 Barr Harbor Drive, West Conshohocken, PA 19428-2959; http:/www.astm.org.) ELECTRONICS INDUSTRIES ASSOCIATION (EIA) JEDEC Standard EIA/JESD78 - IC Latch-Up Test. (Applications for copies should be addressed

23、to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington, VA 22201; http:/www.jedec.org.) (Non-Government standards and other publications are normally available from the organizations that prepare or distribute the documents. These documents also may be available in or through li

24、braries or other informational services.) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific e

25、xemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan sh

26、all not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein. 3.2 Design, construction, and physical dimensions. The design, construct

27、ion, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance with 1.2.4 herein and Figure 1. Provided by IHSNot for ResaleNo reproducti

28、on or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07210 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL SHEET 5 DSCC FORM 2234 APR 97 3.2.2 Terminal connections. The terminal connections shall be as specified on Figure 2. 3.2.3

29、Truth table. The truth table shall be as specified on Figure 3. 3.2.4 Block diagram. The block or logic diagram(s) shall be as specified on figure 4. 3.2.5 Output Load diagram(s). The output load circuit shall be as specified on figure 5. 3.2.6 Timing waveforms. The read and write cycle waveforms sh

30、all be as specified on figures 6a and 6b. 3.2.7 Radiation exposure circuit. The radiation test circuit shall be as specified on figure 7 and will be maintained under document revision level control by the manufacturer and shall be made available to the preparing or acquiring activity upon request (s

31、ee figure 7). 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature range

32、. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be ma

33、rked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be i

34、n accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shall

35、 be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certifica

36、te of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers pr

37、oduct meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device cl

38、ass M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for a

39、ny change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore

40、at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 41 (see MIL-PRF-38535, appendix A). 4. VERIFICATION 4.1 Sampling and inspection. For device classes Q and V, sampling and inspect

41、ion procedures shall be in accordance with MIL-PRF-38535 or as modified in the device manufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accord

42、ance with MIL-PRF-38535, appendix A. 4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with method 50

43、04 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-07210 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990

44、 REVISION LEVEL SHEET 6 DSCC FORM 2234 APR 97 4.2.1 Additional criteria for device class M. a. Burn-in test, method 1015 of MIL-STD-883. (1) Test condition D. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available to the preparing o

45、r acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in method 1015. (2) TA= +125C, minimum. b. Interim and final electrical test parameters shall be as specified in Table IIA here

46、in. 4.2.2 Additional criteria for device classes Q and V. a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device manufacturers QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under documen

47、t revision level control of the device manufacturers Technology Review Board (TRB) in accordance with MIL-PRF-38535 and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs, outputs, biases, and power dissipation, as applicable, in ac

48、cordance with the intent specified in method 1015 of MIL-STD-883. b. Interim and final electrical test parameters shall be as specified in table IIA. c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in MIL-PRF-38535, appendix B. 4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups A, B,