DLA SMD-5962-05207 REV B-2007 MICROCIRCUIT DIGITAL CMOS 16-BIT MICROPROCESSOR MIL-STD-1750 INSTRUCTION SET ARCHITECTURE MONOLITHIC SILICON《硅单片MIL-STD-1750型指令集结构 16比特微型信息处理机氧化物半导体数字.pdf

《DLA SMD-5962-05207 REV B-2007 MICROCIRCUIT DIGITAL CMOS 16-BIT MICROPROCESSOR MIL-STD-1750 INSTRUCTION SET ARCHITECTURE MONOLITHIC SILICON《硅单片MIL-STD-1750型指令集结构 16比特微型信息处理机氧化物半导体数字.pdf》由会员分享，可在线阅读，更多相关《DLA SMD-5962-05207 REV B-2007 MICROCIRCUIT DIGITAL CMOS 16-BIT MICROPROCESSOR MIL-STD-1750 INSTRUCTION SET ARCHITECTURE MONOLITHIC SILICON《硅单片MIL-STD-1750型指令集结构 16比特微型信息处理机氧化物半导体数字.pdf（33页珍藏版）》请在麦多课文档分享上搜索。

1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Correct the lead finish designator from “A” to “C” in paragraph 1.2. - CFS 05-03-28 Thomas M. Hess B Add case outline Y. - CFS 07-03-05 Thomas M. Hess REV SHET REV B B B B B B B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 2

2、8 29 30 31 32 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Charles F. Saffle DEFENSE SUPPLY CENTER COLUMBUS STANDARD MICROCIRCUIT DRAWING CHECKED BY Charles F. Saffle COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS

3、AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Thomas M. Hess MICROCIRCUIT, DIGITAL, CMOS, 16-BIT MICROPROCESSOR, MIL-STD-1750 INSTRUCTION SET ARCHITECTURE, AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 05-02-18 MONOLITHIC SILICON AMSC N/A REVISION LEVEL SIZE A CAGE CODE 67268 59

4、62-05207 B SHEET 1 OF 32 DSCC FORM 2233 APR 97 5962-E276-07 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-05207 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 22

5、34 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN).

6、 When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 05207 01 Q X C Federal stock class designator RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4

7、) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA

8、levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic number Circuit function 01 HX1750 16-bit microprocessor with MIL-STD-1750 instruction set architect

9、ure, full terminal connection 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN class leve

10、l B microcircuits in accordance with MIL-PRF-38535, appendix A Q or V Certification and qualification to MIL-PRF-38535 1.2.4 Case outlines. The case outlines are as designated in MIL-STD-1835 and as follows: Outline letter Descriptive designator Terminals Package style X CMGA17-P121 121 Pin grid arr

11、ay Y See figure 1. 100 Unformed-lead chip carrier Z CMGA17-P113 113 Pin grid array 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted with

12、out license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-05207 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage range (VDD). -0.5 V dc to +6.5 V dc Input voltage range (VIN). -0.5 V dc to

13、 +6.5 V dc Storage temperature range (TSTG) -65C to +150C Lead temperature (soldering, 10 seconds) . +270C Thermal resistance, junction-to-case (JC): Case outlines X and Z. See MIL-STD-1835 Case outline Y. 2.1C/W Junction temperature (TJ) . +175C Maximum power dissipation (PD) 1.0 W 1.4 Recommended

14、operating conditions. Supply voltage range (VDD). +4.5 V dc to +5.5 V dc Minimum high level input voltage (VIH) 2.0 V dc Maximum low level input voltage (VIL) 0.8 V dc Operating frequency (FCLK). 40 MHz Case operating temperature range (TC) -55C to +125C 2. APPLICABLE DOCUMENTS 2.1 Government specif

15、ication, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-

16、38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit

17、Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or http:/assist.daps.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of

18、 precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. _ 1/ Stresses above the ab

19、solute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-05207 D

20、EFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device man

21、ufacturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herei

22、n. 3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outlines. The case outlines shall be in accordan

23、ce with 1.2.4 herein and as specified on figure 1. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2. 3.2.3 Functional block diagram. The functional block diagram shall be as specified on figure 3. 3.2.4 Timing waveforms. The timing waveforms shall be as specifie

24、d on figure 4. 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case operating temperature rang

25、e. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturers PIN may also be m

26、arked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shall still be marked. Marking for device classes Q and V shall be

27、in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as required in MIL-PRF-38535. The compliance mark for device class M shal

28、l be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certific

29、ate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall affirm that the manufacturers p

30、roduct meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for device c

31、lass M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein) involving devices acquired to this drawing is required for

32、any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required documentation. Offshore documentation shall be made available onshore

33、 at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 105 (see MIL-PRF-38535, appendix A).Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IH

34、S-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-05207 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ 4.5 V VDD 5.5 V -55C TC +125C unless otherwise specified Group A su

35、bgroups Device type Limits Unit Min Max Input voltage low 2/ VIL2_50 VDD= 4.5V 0.8 V Input voltage high 2/ VIH2_50 VDD= 5.5V 2.0 V Output voltage low VOL3_50 VDD= 4.5 V, IOL= 9 mA 0.4 V Output voltage high VOH3_50 VDD= 4.5 V, IOH= 9 mA 2.4 V Input current high, except TSB and D0 - D15 IIH1_50 VDD= 5

36、.5 V, VIN= 5.5 V -5.0 5.0 A Input current high, for TSB and D0 D15 IIH2_50 VDD= 5.5 V, VIN= 5.5 V -5.0 5.0 A Input current low, except TSB and D0 D15 IIL1_50 VDD= 5.5 V, VIN= GND -5.0 5.0 A Input current low, for TSB and D0 - D15 IIL2_50 VDD= 5.5 V, VIN= GND -400 -100 A Three-state output current hi

37、gh, except TSB and D0 - D15 IOZH1_50 VDD= 5.5 V, VOUT= 5.5 V -1.0 1.0 A Three-state output current high, for TSB and D0 - D15 IOZH2_50 VDD= 5.5 V, VOUT= 5.5 V -1.0 1.0 A Three-state output current low, except TSB and D0 - D15 IOZL1_50 VDD= 5.5 V, VOUT= 0.0 V -1.0 1.0 A Three-state output current low

38、, for TSB and D0 - D15 IOZL2_50 VDD= 5.5 V, VOUT= 0.0 V -400 -100 A Static VDDsupply current IDDsb_50 VDD= 5.5 V, VIN= 0.0 V or 5.5 V 5 mA Dynamic VDDsupply current IDDop_50 VDD= 5.5 V, VIN= 0.0 V or 5.5 V Freq = 40 MHz 1, 2, 3 183 mA Input capacitance 2/ CIN6 pF FCLK capacitance 2/ CINpFOutput capa

39、citance 2/ COUT10 pFSTB and SCLK output capacitance 2/ COUTSee 4.4.1d 4 All 17 pF See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-05207 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS,

40、OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ 4.5 V VDD 5.5 V -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Data Bus input/output capacitance 2/ CI/OSe

41、e 4.4.1d 4 12 pF Functional tests See 4.4.1b and 4.4.1c 7, 8 All Hold Tests RDY hold from FCLK 3/ tHF(RDY) 2 ns Data hold from FCLK for a read cycle 3/ tHS(D)R 8 WCODE hold from FCLK 2/ 3/ tHS2(W)S, tHS3(W)S, tHF(W)A 8 ns CONREQB hold to FCLK 2/ 3/ tHLD(CR) 10 ns INT0B-INT7B, PWRDNB hold from FCLK 2

42、/ 3/ tHS(INTB) See figure 3. 4/ 5/ 9, 10, 11 All 10 ns Setup Tests RDY setup to FCLK 3/ tSUF(RDY) 3 ns Data setup to FCLK for a read cycle 3/ tSUS(D)R 0 DMAREQ rise setup to FCLK 3/ tRSUS(DR) 4 ns DMAREQ fall setup to FCLK 3/ tFSUS9 ILLADDB, MPROEB, PEB, PIOXEB setup to FCLK 3/ tSUS(FTB) 18 ns FTSPA

43、RE, BITE setup to FCLK 3/ tSUS(FT) 5 ns CONREQB setup to FCLK 2/ 3/ tSUS(CR) 20 INT0B-INT7B, PWRDNB setup to FCLK 2/ 3/ tSUS(INTB) ns WCODE setup to FCLK 2/ 3/ tSUS(W), tSUS2(W) See figure 3. 4/ 5/ 9, 10, 11 All 24 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or net

44、working permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-05207 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ 4.5 V VDD 5.5

45、V -55C TC +125C unless otherwise specified Group A subgroups Device type Limits Unit Min Max Propagation Delay Tests SCLK delay from FCLK 3/ tPF(SCLK) 13 ns Address delay from FCLK 3/ tPS(AD) 23 ASCSB delay from FCLK 3/ tPS(AS) 22 ns FLT delay from FCLK 3/ tPS(FLT) 26 Address, ASCSB (no MMU) hold fr

46、om FCLK 3/ 6/ tHS(A) 5 ns DI, IOM, DTR, XBO delay from FCLK 3/ tPS(B) 21 ns DI, IOM, DTR,XBO hold from FCLK 3/ 6/ tHS(B) 5 NOP delay from FCLK 3/ tPS(NOP) 22 ns STB rise delay from FCLK for a read cycle 3/ tRPF(STB)R 16 DMAK rise delay from FCLK 3/ tRPS(DMAK) 21 ns SNEW delay from FCLK 3/ tPS(SNEW)

47、19 Data delay from FCLK for a write cycle 7/ tPS(D)W 48 ns STB fall delay from FCLK 3/ tFPF(STB) 17 STB rise delay from FCLK for a write cycle 3/ 8/ tRPF(STB)W 13 ns DMAK fall delay from FCLK 3/ tFPF(DMAK) 19 INTEN, INTKCODE delay from FCLK 3/ tPS(I) 26 ns DMAEN, INTK, NPU, OD, SUROM, RDOR, RDI, RIC

48、1, RIC2 delay from FCLK 3/ tPS(DIS) See figure 3. 4/ 5/ 9, 10, 11 All 24 ns See footnotes at end of table. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-05207 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 8 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics - Continued. Test Symbol Conditions 1/ 4.5 V VDD 5.5 V -55C TC +125C unless otherwise specified Group A subgroups Device type Li