DLA SMD-5962-03245 REV B-2008 MICROCIRCUIT DIGITAL CMOS FIXED-POINT DIGITAL SIGNAL PROCESSOR MONOLITHIC SILICON.pdf

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1、 REVISIONS LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Change “cycle-to-cycle” jitter designation to “period” jitter designation in table I and figure 5 waveforms. Correct pinout in figure 2 case outline. Update drawing boilerplate to latest requirements. - CFS 04-03-11 Thomas M. Hess B Update boiler

2、plate to current MIL-PRF-38535 requirements. - CFS 08-11-03 Thomas M. Hess REV B B B B B SHEET 75 76 77 78 79 REV B B B B B B B B B B B B B B B B B B B B SHEET 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 REV B B B B B B B B B B B B B B B B B B B B SHEET 35 36 37 38 39 40 41 42 43 44

3、45 46 47 48 49 50 51 52 53 54 REV B B B B B B B B B B B B B B B B B B B B SHEET 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 REV STATUS REV B B B B B B B B B B B B B B OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PMIC N/A PREPARED BY Charles F. Saffle STANDARD MICROCIRCUIT DRAWING

4、 CHECKED BY Charles F. Saffle DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 http:/www.dscc.dla.mil THIS DRAWING IS AVAILABLE FOR USE BY ALL DEPARTMENTS APPROVED BY Thomas M. Hess AND AGENCIES OF THE DEPARTMENT OF DEFENSE DRAWING APPROVAL DATE 04-01-06 MICROCIRCUIT, DIGITAL, CMOS, FIXED-PO

5、INT DIGITAL SIGNAL PROCESSOR, MONOLITHIC SILICON AMSC N/A REVISION LEVEL B SIZE A CAGE CODE 67268 5962-03245 SHEET 1 OF 79 DSCC FORM 2233 APR 97 5962-E035-09 Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-03

6、245 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 2 DSCC FORM 2234 APR 97 1. SCOPE 1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M) and space application (device class V). A choice of case o

7、utlines and lead finishes are available and are reflected in the Part or Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels is reflected in the PIN. 1.2 PIN. The PIN is as shown in the following example: 5962 - 03245 01 Q X X Federal stock class designato

8、r RHA designator (see 1.2.1) Device type (see 1.2.2)Device class designatorCase outline (see 1.2.4) Lead finish (see 1.2.5) / (see 1.2.3) / Drawing number 1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and are marked with the appropriate R

9、HA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device. 1.2.2 Device type(s). The device type(s) identify the circuit function as follows: Device type Generic n

10、umber Circuit function Frequency 01 SMJ320C6415 Fixed-point digital signal processor 600 MHz 1.2.3 Device class designator. The device class designator is a single letter identifying the product assurance level as follows: Device class Device requirements documentation M Vendor self-certification to

11、 the requirements for MIL-STD-883 compliant, non-JAN class level B microcircuits in accordance with MIL-PRF-38535, appendix A. Q or V Certification and qualification to MIL-PRF-38535. 1.2.4 Case outline(s). The case outline(s) are as designated in MIL-STD-1835 and as follows: Outline letter Descript

12、ive designator Terminals Package style X See figure 2 570 Ceramic pin grid array 1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix A for device class M. Provided by IHSNot for ResaleNo reproduction or networking permitted withou

13、t license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-03245 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ Supply voltage core range (CVDD) . -0.3 V dc to +1.8 V dc 2/ Supply voltage I/O range (DVDD)

14、 . -0.3 V dc to +4.0 V dc 2/ Input voltage range (VIN): (except PCI) . -0.3 V dc to +4.0 V dc (PCI) (VIP). -0.5 V to DVDD+ 0.5 V Output voltage range (VOUT): (except PCI) . -0.3 V dc to +4.0 V dc (PCI) (VOP) . -0.5 V to DVDD+ 0.5 V Operating case temperature range (TC). -55C to +115C Storage tempera

15、ture range (Tstg). -65C to +150C 1.4 Recommended operating conditions. Supply voltage core range (CVDD) . +1.36 V dc to +1.44 V dc 3/ Supply voltage I/O range (DVDD) . +3.14 V dc to +3.46 V dc Supply voltage ground (VSS) +0.0 V dc Minimum high level input voltage (except PCI) (VIH) +2.0 V dc Maximum

16、 low level input voltage (except PCI) (VIL). +0.8 V dc Input voltage range (PCI) (VIP). -0.5 V to DVDD+0.5 V High level input voltage range (PCI) (VIHP) 0.5DVDDto DVDD+0.5 V Low level input voltage range (PCI) (VILP) -0.5 V to 0.3DVDD Maximum voltage during overshoot/undershoot (VOS). -1.0 V dc to +

17、4.3 V dc 4/ Operating case temperature range (TC). -55C to +115C FIGURE 1. Impact of elevated temperature on device life. _ 1/ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device

18、 at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. See figure 1 above for impact of elevated temperature on device life. 2/ All voltage val

19、ues are with respect to VSS. 3/ Future variants of the C641x DSPs may operate at voltages ranging from 1.2 V to 1.4 V to provide a range of system power/performance options. The manufacturer highly recommends that users design-in a supply that can handle multiple voltages within this range (i.e., 1.

20、2 V, 1.25 V, 1.3 V, 1.35 V, 1.4 V with 3% tolerances) by implementing simple board changes such as reference resistor values or input pin configuration modifications. 4/ The maximum ratings should not be exceeded for more than 30% of the cycle period. Provided by IHSNot for ResaleNo reproduction or

21、networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-03245 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 4 DSCC FORM 2234 APR 97 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following spec

22、ification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General S

23、pecification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawin

24、gs. (Copies of these documents are available online at http:/assist.daps.dla.mil/quicksearch/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Non-Government publications. The following documents form a part of this document to the e

25、xtent specified herein. Unless otherwise specified, the issues of documents are the issues of the documents cited in the solicitation. INSTITUTE OF ELECTRICAL AND ELECTRONICS ENGINEERS (IEEE) IEEE 1149.1-1990 - Standard Test Access Port and Boundary Scan Architecture. (Applications for copies should

26、 be addressed to the Institute of Electrical and Electronics Engineers, 445 Hoes Lane, Piscataway, NJ 08855-1331) 2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document,

27、 however, supersedes applicable laws and regulations unless a specific exemption has been obtained. 3. REQUIREMENTS 3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535 and as specified herein or as modified in the device manufa

28、cturers Quality Management (QM) plan. The modification in the QM plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein.

29、3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M. 3.2.1 Case outline. The case outline shall be in accordance wi

30、th 1.2.4 herein and figure 2. 3.2.2 Terminal connections. The terminal connections shall be as specified on figure 3. 3.2.3 Block diagram. The block diagram shall be as specified on figure 4. 3.2.4 Test circuit and switching waveforms. The test circuit and switching waveforms shall be as specified o

31、n figures 5a 5kk. 3.2.5 Boundary scan instruction codes. The boundary scan instruction codes shall be as specified on figure 6. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-03245 DEFENSE SUPPLY CENTER COLU

32、MBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 5 DSCC FORM 2234 APR 97 3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical performance characteristics and postirradiation parameter limits are as specified in table

33、I and shall apply over the full case operating temperature range. 3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table II. The electrical tests for each subgroup are defined in table I. 3.5 Marking. The part shall be marked with the PIN listed

34、in 1.2 herein. In addition, the manufacturers PIN may also be marked. For packages where marking of the entire SMD PIN number is not feasible due to space limitations, the manufacturer has the option of not marking the “5962-“ on the device. For RHA product using this option, the RHA designator shal

35、l still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class M shall be in accordance with MIL-PRF-38535, appendix A. 3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a “QML“ or “Q“ as require

36、d in MIL-PRF-38535. The compliance mark for device class M shall be a “C“ as required in MIL-PRF-38535, appendix A. 3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535 listed manufacturer in order to supply to the requirements of

37、this drawing (see 6.6.1 herein). For device class M, a certificate of compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2 herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source o

38、f supply for this drawing shall affirm that the manufacturers product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for device class M, the requirements of MIL-PRF-38535, appendix A and herein. 3.7 Certificate of conformance. A certificate of conformance as requi

39、red for device classes Q and V in MIL-PRF-38535 or for device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing. 3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 here

40、in) involving devices acquired to this drawing is required for any change that affects this drawing. 3.9 Verification and review for device class M. For device class M, DSCC, DSCCs agent, and the acquiring activity retain the option to review the manufacturers facility and applicable required docume

41、ntation. Offshore documentation shall be made available onshore at the option of the reviewer. 3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit group number 105 (see MIL-PRF-38535, appendix A). 3.11 IEEE 1149.1 compliance.

42、 These devices shall be compliant to IEEE 1149.1. Provided by IHSNot for ResaleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-03245 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 6 DSCC FORM 2234 APR 97

43、TABLE I. Electrical performance characteristics. Test Symbol Conditions 1/ 2/ -55C TC +115C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max High level output voltage (except PCI) VOHDVDD= MIN, IOH= MAX 1, 2, 3 All 2.4 V High level output voltage (PCI) VOHPDVDD= 3.3 V, IOH

44、P= -0.5 mA 1, 2, 3 All 0.9DVDD3/ V Low level output voltage (except PCI) VOLDVDD= MIN, IOL= MAX 1, 2, 3 All 0.4 V Low level output voltage (PCI) VOLPDVDD= 3.3 V, IOLP= 1.5 mA 1, 2, 3 All 0.1DVDD3/ V VI= VSSto DVDD, no opposing internal resistor 10 VI= VSSto DVDD, opposing internal pullup resistor 4/

45、 50 150 Input current (except PCI) IIVI= VSSto DVDD, opposing internal pulldown resistor 4/ 1, 2, 3 All -150 -50 A Input leakage current (PCI) IIP5/ 0 VIP DVDD= 3.3 V 1, 2, 3 All 10 A EMIF, CLKOUT4, CLKOUT6, EMUx 16 Timer, UTOPIA, TDO, GPIO (excluding GP15:9, 2, 1), McBSP -8 High level output curren

46、t IOHPCI/HPI 1, 2, 3 All -0.5 3/ mA EMIF, CLKOUT4, CLKOUT6, EMUx 16 Timer, UTOPIA, TDO, GPIO (excluding GP15:9, 2, 1), McBSP 8 Low level output current IOLPCI/HPI 1, 2, 3 All 1.5 3/ mA Off-state output current IOZVO= DVDDor 0 V 1, 2, 3 All 10 A Core supply current ICDD6/ CVDD= 1.4 V, CPU clock = 600

47、 MHz 1, 2, 3 All 750 TYP 7/ mA I/O supply current IDDD6/ DVDD= 3.3 V, CPU clock = 600 MHz 1, 2, 3 All 125 TYP 7/ mA Input capacitance CINSee 4.4.1b 4 All 12 pF Output capacitance COUTSee 4.4.1b 4 All 12 pF Functional tests See 4.4.1c 7, 8 All See footnotes at end of table. Provided by IHSNot for Res

48、aleNo reproduction or networking permitted without license from IHS-,-,-STANDARD MICROCIRCUIT DRAWING SIZE A 5962-03245 DEFENSE SUPPLY CENTER COLUMBUS COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 7 DSCC FORM 2234 APR 97 TABLE I. Electrical performance characteristics Continued. Test Symbol Condi

49、tions 1/ 2/ 8/ -55C TC +115C unless otherwise specified Group A subgroupsDevice type Limits Unit Min Max CLKIN Timing Requirements 9/ 10/ PLL Mode x12 See ref. 1, figure 5b. 20 33.3 PLL Mode x6 See ref. 1, figure 5b. 13.3 33.3 Cycle time, CLKIN tc(CLKIN)x1 (Bypass) See ref. 1, figure 5b. 9, 10, 11 All 13.3 7/